freedreno/ir3: Set up the block predecessors for a3xx TF

Fixes a segfault in ir3_legalize.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
This commit is contained in:
Eric Anholt
2020-04-30 17:30:02 -07:00
committed by Marge Bot
parent 7bd15135a6
commit b0b8011e3e
2 changed files with 8 additions and 2 deletions
+1
View File
@@ -1023,6 +1023,7 @@ struct ir3_block * ir3_block_create(struct ir3 *shader)
block->shader = shader;
list_inithead(&block->node);
list_inithead(&block->instr_list);
block->predecessors = _mesa_pointer_set_create(block);
return block;
}
+7 -2
View File
@@ -2644,7 +2644,6 @@ get_block(struct ir3_context *ctx, const nir_block *nblock)
block->nblock = nblock;
_mesa_hash_table_insert(ctx->block_ht, nblock, block);
block->predecessors = _mesa_pointer_set_create(block);
set_foreach(nblock->predecessors, sentry) {
_mesa_set_add(block->predecessors, get_block(ctx, sentry->key));
}
@@ -2758,10 +2757,12 @@ emit_cf_list(struct ir3_context *ctx, struct exec_list *list)
* // succs: blockStreamOut, blockNewEnd
* }
* blockStreamOut {
* // preds: blockOrigEnd
* ... stream-out instructions ...
* // succs: blockNewEnd
* }
* blockNewEnd {
* // preds: blockOrigEnd, blockStreamOut
* }
*/
static void
@@ -2787,7 +2788,6 @@ emit_stream_out(struct ir3_context *ctx)
*/
orig_end_block = ctx->block;
// TODO these blocks need to update predecessors..
// maybe w/ store_global intrinsic, we could do this
// stuff in nir->nir pass
@@ -2799,7 +2799,12 @@ emit_stream_out(struct ir3_context *ctx)
orig_end_block->successors[0] = stream_out_block;
orig_end_block->successors[1] = new_end_block;
stream_out_block->successors[0] = new_end_block;
_mesa_set_add(stream_out_block->predecessors, orig_end_block);
_mesa_set_add(new_end_block->predecessors, orig_end_block);
_mesa_set_add(new_end_block->predecessors, stream_out_block);
/* setup 'if (vtxcnt < maxvtxcnt)' condition: */
cond = ir3_CMPS_S(ctx->block, vtxcnt, 0, maxvtxcnt, 0);