nir: Add a pass to lower local variables to registers
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
This commit is contained in:
Jason Ekstrand
@@ -22,6 +22,7 @@ NIR_FILES = \
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$(GLSL_SRCDIR)/nir/nir_intrinsics.h \
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$(GLSL_SRCDIR)/nir/nir_live_variables.c \
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$(GLSL_SRCDIR)/nir/nir_lower_atomics.c \
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$(GLSL_SRCDIR)/nir/nir_lower_locals_to_regs.c \
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$(GLSL_SRCDIR)/nir/nir_lower_samplers.cpp \
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$(GLSL_SRCDIR)/nir/nir_lower_system_values.c \
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$(GLSL_SRCDIR)/nir/nir_lower_variables.c \
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@@ -1358,6 +1358,8 @@ void nir_dump_cfg(nir_shader *shader, FILE *fp);
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void nir_split_var_copies(nir_shader *shader);
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void nir_lower_locals_to_regs(nir_shader *shader);
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void nir_lower_variables(nir_shader *shader);
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void nir_lower_variables_scalar(nir_shader *shader, bool lower_globals,
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@@ -0,0 +1,313 @@
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Jason Ekstrand (jason@jlekstrand.net)
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*
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*/
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#include "nir.h"
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struct locals_to_regs_state {
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void *mem_ctx;
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nir_function_impl *impl;
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/* A hash table mapping derefs to registers */
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struct hash_table *regs_table;
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};
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/* The following two functions implement a hash and equality check for
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* variable dreferences. When the hash or equality function encounters an
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* array, it ignores the offset and whether it is direct or indirect
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* entirely.
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*/
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static uint32_t
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hash_deref(const void *void_deref)
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{
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const nir_deref *deref = void_deref;
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uint32_t hash;
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if (deref->child) {
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hash = hash_deref(deref->child);
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} else {
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hash = 2166136261ul;
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}
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switch (deref->deref_type) {
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case nir_deref_type_var:
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hash ^= _mesa_hash_pointer(nir_deref_as_var(deref)->var);
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break;
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case nir_deref_type_array: {
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hash ^= 268435183;
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break;
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}
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case nir_deref_type_struct:
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hash ^= nir_deref_as_struct(deref)->index;
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break;
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}
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return hash * 0x01000193;
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}
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static bool
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derefs_equal(const void *void_a, const void *void_b)
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{
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const nir_deref *a = void_a;
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const nir_deref *b = void_b;
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if (a->deref_type != b->deref_type)
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return false;
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switch (a->deref_type) {
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case nir_deref_type_var:
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if (nir_deref_as_var(a)->var != nir_deref_as_var(b)->var)
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return false;
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break;
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case nir_deref_type_array:
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/* Do nothing. All array derefs are the same */
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break;
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case nir_deref_type_struct:
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if (nir_deref_as_struct(a)->index != nir_deref_as_struct(b)->index)
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return false;
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break;
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default:
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unreachable("Invalid dreference type");
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}
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assert((a->child == NULL) == (b->child == NULL));
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if (a->child)
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return derefs_equal(a->child, b->child);
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else
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return true;
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}
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static nir_register *
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get_reg_for_deref(nir_deref_var *deref, struct locals_to_regs_state *state)
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{
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uint32_t hash = hash_deref(deref);
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struct hash_entry *entry =
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_mesa_hash_table_search_pre_hashed(state->regs_table, hash, deref);
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if (entry)
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return entry->data;
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unsigned array_size = 1;
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nir_deref *tail = &deref->deref;
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while (tail->child) {
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if (tail->child->deref_type == nir_deref_type_array) {
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/* Multiply by the parent's type. */
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if (glsl_type_is_matrix(tail->type)) {
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array_size *= glsl_get_matrix_columns(tail->type);
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} else {
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assert(glsl_get_length(tail->type) > 0);
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array_size *= glsl_get_length(tail->type);
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}
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}
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tail = tail->child;
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}
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assert(glsl_type_is_vector(tail->type) || glsl_type_is_scalar(tail->type));
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nir_register *reg = nir_local_reg_create(state->impl);
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reg->num_components = glsl_get_vector_elements(tail->type);
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reg->num_array_elems = array_size > 1 ? array_size : 0;
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_mesa_hash_table_insert_with_hash(state->regs_table, hash, deref, reg);
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return reg;
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}
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static nir_src
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get_deref_reg_src(nir_deref_var *deref, nir_instr *instr,
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struct locals_to_regs_state *state)
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{
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nir_src src;
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src.is_ssa = false;
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src.reg.reg = get_reg_for_deref(deref, state);
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src.reg.base_offset = 0;
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src.reg.indirect = NULL;
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nir_deref *tail = &deref->deref;
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while (tail->child != NULL) {
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const struct glsl_type *parent_type = tail->type;
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tail = tail->child;
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if (tail->deref_type != nir_deref_type_array)
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continue;
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nir_deref_array *deref_array = nir_deref_as_array(tail);
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src.reg.base_offset *= glsl_get_length(parent_type);
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src.reg.base_offset += deref_array->base_offset;
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if (src.reg.indirect) {
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nir_load_const_instr *load_const =
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nir_load_const_instr_create(state->mem_ctx);
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load_const->num_components = 1;
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load_const->value.u[0] = glsl_get_length(parent_type);
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load_const->dest.is_ssa = true;
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nir_ssa_def_init(&load_const->instr, &load_const->dest.ssa, 1, NULL);
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nir_instr_insert_before(instr, &load_const->instr);
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nir_alu_instr *mul = nir_alu_instr_create(state->mem_ctx, nir_op_imul);
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mul->src[0].src = *src.reg.indirect;
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mul->src[1].src.is_ssa = true;
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mul->src[1].src.ssa = &load_const->dest.ssa;
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mul->dest.write_mask = 1;
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mul->dest.dest.is_ssa = true;
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nir_ssa_def_init(&mul->instr, &mul->dest.dest.ssa, 1, NULL);
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nir_instr_insert_before(instr, &mul->instr);
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src.reg.indirect->is_ssa = true;
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src.reg.indirect->ssa = &mul->dest.dest.ssa;
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}
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if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
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if (src.reg.indirect == NULL) {
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src.reg.indirect = ralloc(state->mem_ctx, nir_src);
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*src.reg.indirect = nir_src_copy(deref_array->indirect,
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state->mem_ctx);
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} else {
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nir_alu_instr *add = nir_alu_instr_create(state->mem_ctx,
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nir_op_iadd);
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add->src[0].src = *src.reg.indirect;
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add->src[1].src = nir_src_copy(deref_array->indirect,
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state->mem_ctx);
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add->dest.write_mask = 1;
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add->dest.dest.is_ssa = true;
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nir_ssa_def_init(&add->instr, &add->dest.dest.ssa, 1, NULL);
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nir_instr_insert_before(instr, &add->instr);
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src.reg.indirect->is_ssa = true;
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src.reg.indirect->ssa = &add->dest.dest.ssa;
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}
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}
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}
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return src;
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}
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static bool
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lower_locals_to_regs_block(nir_block *block, void *void_state)
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{
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struct locals_to_regs_state *state = void_state;
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nir_foreach_instr_safe(block, instr) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_var_vec1:
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case nir_intrinsic_load_var_vec2:
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case nir_intrinsic_load_var_vec3:
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case nir_intrinsic_load_var_vec4: {
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if (intrin->variables[0]->var->data.mode != nir_var_local)
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continue;
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nir_alu_instr *mov = nir_alu_instr_create(state->mem_ctx, nir_op_imov);
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mov->src[0].src = get_deref_reg_src(intrin->variables[0],
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&intrin->instr, state);
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unsigned num_components = mov->src[0].src.reg.reg->num_components;
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mov->dest.write_mask = (1 << num_components) - 1;
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if (intrin->dest.is_ssa) {
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mov->dest.dest.is_ssa = true;
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nir_ssa_def_init(&mov->instr, &mov->dest.dest.ssa,
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num_components, NULL);
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nir_src new_src = {
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.is_ssa = true,
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.ssa = &mov->dest.dest.ssa,
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};
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, new_src,
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state->mem_ctx);
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} else {
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mov->dest.dest = nir_dest_copy(intrin->dest, state->mem_ctx);
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}
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nir_instr_insert_before(&intrin->instr, &mov->instr);
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nir_instr_remove(&intrin->instr);
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break;
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}
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case nir_intrinsic_store_var_vec1:
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case nir_intrinsic_store_var_vec2:
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case nir_intrinsic_store_var_vec3:
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case nir_intrinsic_store_var_vec4: {
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if (intrin->variables[0]->var->data.mode != nir_var_local)
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continue;
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nir_src reg_src = get_deref_reg_src(intrin->variables[0],
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&intrin->instr, state);
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unsigned num_components = reg_src.reg.reg->num_components;
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nir_alu_instr *mov = nir_alu_instr_create(state->mem_ctx, nir_op_imov);
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mov->src[0].src = nir_src_copy(intrin->src[0], state->mem_ctx);
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mov->dest.write_mask = (1 << num_components) - 1;
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mov->dest.dest.is_ssa = false;
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mov->dest.dest.reg.reg = reg_src.reg.reg;
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mov->dest.dest.reg.base_offset = reg_src.reg.base_offset;
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mov->dest.dest.reg.indirect = reg_src.reg.indirect;
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nir_instr_insert_before(&intrin->instr, &mov->instr);
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nir_instr_remove(&intrin->instr);
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break;
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}
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case nir_intrinsic_copy_var:
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unreachable("There should be no copies whatsoever at this point");
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break;
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default:
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continue;
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}
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}
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return true;
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}
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static void
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nir_lower_locals_to_regs_impl(nir_function_impl *impl)
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{
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struct locals_to_regs_state state;
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state.mem_ctx = ralloc_parent(impl);
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state.impl = impl;
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state.regs_table = _mesa_hash_table_create(NULL, hash_deref, derefs_equal);
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nir_foreach_block(impl, lower_locals_to_regs_block, &state);
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_mesa_hash_table_destroy(state.regs_table, NULL);
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}
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void
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nir_lower_locals_to_regs(nir_shader *shader)
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{
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nir_foreach_overload(shader, overload) {
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if (overload->impl)
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nir_lower_locals_to_regs_impl(overload->impl);
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}
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}
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