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swr/rast: Correctly align 64-byte spills/fills

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Fixes crashes on some compute shaders when running on AVX512

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
This commit is contained in:
Alok Hota
2018-08-13 18:14:45 -05:00
parent 78bab66479
commit ae400a9b11
1 changed files with 2 additions and 2 deletions
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src/gallium/drivers/swr/rasterizer/core/backend.cpp
+2 -2
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@@ -61,14 +61,14 @@ void ProcessComputeBE(DRAW_CONTEXT* pDC,
size_t spillFillSize = pDC->pState->state.totalSpillFillSize;
if (spillFillSize && pSpillFillBuffer == nullptr)
{
pSpillFillBuffer = pDC->pArena->AllocAlignedSync(spillFillSize, KNOB_SIMD_BYTES);
pSpillFillBuffer = pDC->pArena->AllocAlignedSync(spillFillSize, KNOB_SIMD16_BYTES);
}
size_t scratchSpaceSize =
pDC->pState->state.scratchSpaceSize * pDC->pState->state.scratchSpaceNumInstances;
if (scratchSpaceSize && pScratchSpace == nullptr)
{
pScratchSpace = pDC->pArena->AllocAlignedSync(scratchSpaceSize, KNOB_SIMD_BYTES);
pScratchSpace = pDC->pArena->AllocAlignedSync(scratchSpaceSize, KNOB_SIMD16_BYTES);
}
const API_STATE& state = GetApiState(pDC);