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anv: make anv_pipeline_sets_layout looks more like vk_pipeline_layout

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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36512>
This commit is contained in:
Lionel Landwerlin
2024-08-06 10:43:50 +03:00
committed by Marge Bot
parent e8638b66bd
commit aa4c7283a1
7 changed files with 59 additions and 58 deletions
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src/intel/vulkan/anv_cmd_buffer.c
+5 -5
View File
@@ -679,15 +679,15 @@ void anv_CmdBindPipeline(
if (layout->independent_sets && layout->num_dynamic_buffers > 0) {
bool modified = false;
for (uint32_t s = 0; s < layout->num_sets; s++) {
if (layout->set[s].layout == NULL)
if (layout->set_layouts[s] == NULL)
continue;
assert(layout->set[s].dynamic_offset_start < MAX_DYNAMIC_BUFFERS);
if (layout->set[s].layout->vk.dynamic_descriptor_count > 0 &&
assert(layout->dynamic_offset_start[s] < MAX_DYNAMIC_BUFFERS);
if (layout->set_layouts[s]->vk.dynamic_descriptor_count > 0 &&
(push->desc_surface_offsets[s] & ANV_DESCRIPTOR_SET_DYNAMIC_INDEX_MASK) !=
layout->set[s].dynamic_offset_start) {
layout->dynamic_offset_start[s]) {
push->desc_surface_offsets[s] &= ~ANV_DESCRIPTOR_SET_DYNAMIC_INDEX_MASK;
push->desc_surface_offsets[s] |= (layout->set[s].dynamic_offset_start &
push->desc_surface_offsets[s] |= (layout->dynamic_offset_start[s] &
ANV_DESCRIPTOR_SET_DYNAMIC_INDEX_MASK);
modified = true;
}
src/intel/vulkan/anv_descriptor_set.c
+15 -14
View File
@@ -1120,7 +1120,7 @@ anv_pipeline_sets_layout_add(struct anv_pipeline_sets_layout *layout,
uint32_t set_idx,
struct anv_descriptor_set_layout *set_layout)
{
if (layout->set[set_idx].layout)
if (layout->set_layouts[set_idx])
return;
/* Workaround CTS : Internal CTS issue 3584 */
@@ -1134,10 +1134,10 @@ anv_pipeline_sets_layout_add(struct anv_pipeline_sets_layout *layout,
layout->num_sets = MAX2(set_idx + 1, layout->num_sets);
layout->set[set_idx].layout = set_layout;
layout->set_layouts[set_idx] = set_layout;
vk_descriptor_set_layout_ref(&set_layout->vk);
layout->set[set_idx].dynamic_offset_start = layout->num_dynamic_buffers;
layout->dynamic_offset_start[set_idx] = layout->num_dynamic_buffers;
layout->num_dynamic_buffers += set_layout->vk.dynamic_descriptor_count;
assert(layout->num_dynamic_buffers < MAX_DYNAMIC_BUFFERS);
@@ -1154,9 +1154,9 @@ anv_pipeline_sets_layout_embedded_sampler_count(const struct anv_pipeline_sets_l
{
uint32_t count = 0;
for (unsigned s = 0; s < layout->num_sets; s++) {
if (!layout->set[s].layout)
if (!layout->set_layouts[s])
continue;
count += layout->set[s].layout->embedded_sampler_count;
count += layout->set_layouts[s]->embedded_sampler_count;
}
return count;
}
@@ -1167,12 +1167,12 @@ anv_pipeline_sets_layout_hash(struct anv_pipeline_sets_layout *layout)
struct mesa_blake3 ctx;
_mesa_blake3_init(&ctx);
for (unsigned s = 0; s < layout->num_sets; s++) {
if (!layout->set[s].layout)
if (!layout->set_layouts[s])
continue;
_mesa_blake3_update(&ctx, &layout->set[s].layout->vk.blake3,
sizeof(layout->set[s].layout->vk.blake3));
_mesa_blake3_update(&ctx, &layout->set[s].dynamic_offset_start,
sizeof(layout->set[s].dynamic_offset_start));
_mesa_blake3_update(&ctx, &layout->set_layouts[s]->vk.blake3,
sizeof(layout->set_layouts[s]->vk.blake3));
_mesa_blake3_update(&ctx, &layout->dynamic_offset_start[s],
sizeof(layout->dynamic_offset_start[s]));
}
_mesa_blake3_update(&ctx, &layout->num_sets, sizeof(layout->num_sets));
_mesa_blake3_final(&ctx, layout->blake3);
@@ -1182,11 +1182,11 @@ void
anv_pipeline_sets_layout_fini(struct anv_pipeline_sets_layout *layout)
{
for (unsigned s = 0; s < layout->num_sets; s++) {
if (!layout->set[s].layout)
if (!layout->set_layouts[s])
continue;
vk_descriptor_set_layout_unref(&layout->device->vk,
&layout->set[s].layout->vk);
&layout->set_layouts[s]->vk);
}
}
@@ -1198,11 +1198,12 @@ anv_pipeline_sets_layout_print(const struct anv_pipeline_sets_layout *layout)
layout->num_sets,
layout->independent_sets);
for (unsigned s = 0; s < layout->num_sets; s++) {
if (!layout->set[s].layout)
if (!layout->set_layouts[s])
continue;
fprintf(stderr, " set%i: dyn_start=%u flags=0x%x\n",
s, layout->set[s].dynamic_offset_start, layout->set[s].layout->vk.flags);
s, layout->dynamic_offset_start[s],
layout->set_layouts[s]->vk.flags);
}
}
src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+29 -27
View File
@@ -98,7 +98,7 @@ bti_multiplier(const struct apply_pipeline_layout_state *state,
uint32_t set, uint32_t binding)
{
const struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
state->layout->set_layouts[set];
const struct anv_descriptor_set_binding_layout *bind_layout =
&set_layout->binding[binding];
@@ -131,12 +131,12 @@ add_binding(struct apply_pipeline_layout_state *state,
uint32_t set, uint32_t binding)
{
const struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
state->layout->set_layouts[set];
const struct anv_descriptor_set_binding_layout *bind_layout =
&set_layout->binding[binding];
assert(set < state->layout->num_sets);
assert(binding < state->layout->set[set].layout->binding_count);
assert(binding < set_layout->binding_count);
if (state->set[set].binding[binding].use_count < UINT8_MAX)
state->set[set].binding[binding].use_count++;
@@ -176,7 +176,7 @@ add_binding_type(struct apply_pipeline_layout_state *state,
add_binding(state, set, binding);
const struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
state->layout->set_layouts[set];
const struct anv_descriptor_set_binding_layout *bind_layout =
&set_layout->binding[binding];
@@ -188,10 +188,10 @@ add_binding_type(struct apply_pipeline_layout_state *state,
(bind_layout->flags & non_pushable_binding_flags) == 0;
if (is_set_pushable && is_binding_pushable &&
(state->layout->set[set].layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER ||
state->layout->set[set].layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
state->layout->set[set].layout->binding[binding].type == VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK ||
state->layout->set[set].layout->binding[binding].type == VK_DESCRIPTOR_TYPE_MUTABLE_EXT) &&
(set_layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER ||
set_layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
set_layout->binding[binding].type == VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK ||
set_layout->binding[binding].type == VK_DESCRIPTOR_TYPE_MUTABLE_EXT) &&
(type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER ||
type == VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK))
state->set[set].binding[binding].properties |= BINDING_PROPERTY_PUSHABLE;
@@ -329,7 +329,7 @@ descriptor_has_bti(nir_intrinsic_instr *intrin,
uint32_t set = nir_intrinsic_desc_set(intrin);
uint32_t binding = nir_intrinsic_binding(intrin);
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
if (state->set[set].binding[binding].properties & BINDING_PROPERTY_EMBEDDED_SAMPLER)
return false;
@@ -652,7 +652,7 @@ build_res_index(nir_builder *b,
struct apply_pipeline_layout_state *state)
{
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
uint32_t array_size = bind_layout->array_size;
@@ -691,7 +691,7 @@ build_res_index(nir_builder *b,
} else {
dynamic_offset_index =
nir_imm_int(b,
state->layout->set[set].dynamic_offset_start +
state->layout->dynamic_offset_start[set] +
bind_layout->dynamic_offset_index);
}
} else {
@@ -851,7 +851,7 @@ build_desc_addr_for_binding(nir_builder *b,
const struct apply_pipeline_layout_state *state)
{
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
switch (state->desc_addr_format) {
case nir_address_format_64bit_global_32bit_offset:
@@ -928,7 +928,7 @@ build_surface_index_for_binding(nir_builder *b,
const struct apply_pipeline_layout_state *state)
{
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
const unsigned descriptor_offset =
binding_descriptor_offset(state, bind_layout, false /* sampler */);
const unsigned descriptor_stride =
@@ -1006,7 +1006,7 @@ build_sampler_handle_for_binding(nir_builder *b,
const struct apply_pipeline_layout_state *state)
{
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
const unsigned descriptor_offset =
binding_descriptor_offset(state, bind_layout, true /* sampler */);
const unsigned descriptor_stride =
@@ -1256,7 +1256,7 @@ build_buffer_addr_for_binding(nir_builder *b,
if (desc_type == VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK) {
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
return nir_vec2(b,
nir_imm_int(b, state->set[set].desc_offset),
nir_imm_int(b, bind_layout->descriptor_surface_offset));
@@ -1351,7 +1351,7 @@ build_buffer_addr_for_idx_intrin(nir_builder *b,
&set, &binding, state);
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
return build_buffer_addr_for_binding(b, bind_layout->type,
set, binding, res_index,
@@ -1409,7 +1409,7 @@ try_lower_direct_buffer_intrinsic(nir_builder *b,
const unsigned binding = nir_intrinsic_binding(desc);
const struct anv_descriptor_set_binding_layout *bind_layout =
&state->layout->set[set].layout->binding[binding];
&state->layout->set_layouts[set]->binding[binding];
nir_address_format addr_format = descriptor_address_format(desc, state);
@@ -2167,7 +2167,7 @@ anv_validate_pipeline_layout(const struct anv_pipeline_sets_layout *layout,
continue;
unsigned set = nir_intrinsic_desc_set(intrin);
assert(layout->set[set].layout);
assert(layout->set_layouts[set]);
}
}
}
@@ -2249,7 +2249,8 @@ add_sampler_entry(struct anv_pipeline_bind_map *map,
const struct anv_pipeline_sets_layout *layout,
const struct anv_descriptor_set_binding_layout *bind_layout)
{
assert((bind_layout->descriptor_index + element) < layout->set[set].layout->descriptor_count);
assert((bind_layout->descriptor_index + element) <
layout->set_layouts[set]->descriptor_count);
map->sampler_to_descriptor[map->sampler_count++] =
(struct anv_pipeline_binding) {
.set = set,
@@ -2286,7 +2287,7 @@ add_embedded_sampler_entry(struct apply_pipeline_layout_state *state,
struct anv_pipeline_embedded_sampler_binding *sampler_bind =
&map->embedded_sampler_to_binding[map->embedded_sampler_count++];
const struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
state->layout->set_layouts[set];
const struct anv_descriptor_set_binding_layout *bind_layout =
&set_layout->binding[binding];
const struct anv_descriptor_set_layout_sampler *sampler =
@@ -2343,7 +2344,7 @@ build_packed_binding_table(struct apply_pipeline_layout_state *state,
unsigned push_block_count = 0;
for (unsigned s = 0; s < state->layout->num_sets; s++) {
const struct anv_descriptor_set_layout *set_layout =
state->layout->set[s].layout;
state->layout->set_layouts[s];
if (!set_layout)
continue;
@@ -2387,7 +2388,7 @@ build_packed_binding_table(struct apply_pipeline_layout_state *state,
unsigned used_binding_count = 0;
for (uint32_t set = 0; set < state->layout->num_sets; set++) {
struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
state->layout->set_layouts[set];
if (!set_layout)
continue;
@@ -2420,7 +2421,7 @@ build_packed_binding_table(struct apply_pipeline_layout_state *state,
used_binding_count = 0;
for (uint32_t set = 0; set < state->layout->num_sets; set++) {
const struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
state->layout->set_layouts[set];
if (!set_layout)
continue;
@@ -2429,7 +2430,7 @@ build_packed_binding_table(struct apply_pipeline_layout_state *state,
continue;
const struct anv_descriptor_set_binding_layout *binding =
&state->layout->set[set].layout->binding[b];
&set_layout->binding[b];
/* Do a fixed-point calculation to generate a score based on the
* number of uses and the binding array size. We shift by 7 instead
@@ -2462,9 +2463,9 @@ build_packed_binding_table(struct apply_pipeline_layout_state *state,
for (unsigned i = 0; i < used_binding_count; i++) {
unsigned set = infos[i].set, b = infos[i].binding;
assert(state->layout->set[set].layout);
assert(state->layout->set_layouts[set]);
const struct anv_descriptor_set_layout *set_layout =
state->layout->set[set].layout;
state->layout->set_layouts[set];
const struct anv_descriptor_set_binding_layout *binding =
&set_layout->binding[b];
@@ -2589,7 +2590,8 @@ anv_nir_apply_pipeline_layout(nir_shader *shader,
/* Allocate binding arrays. */
for (unsigned s = 0; s < state.layout->num_sets; s++) {
const struct anv_descriptor_set_layout *set_layout = layout->set[s].layout;
const struct anv_descriptor_set_layout *set_layout =
layout->set_layouts[s];
if (!set_layout)
continue;
src/intel/vulkan/anv_nir_push_descriptor_analysis.c
+2 -2
View File
@@ -29,8 +29,8 @@ const struct anv_descriptor_set_layout *
anv_pipeline_layout_get_push_set(const struct anv_pipeline_sets_layout *layout,
uint8_t *set_idx)
{
for (unsigned s = 0; s < ARRAY_SIZE(layout->set); s++) {
struct anv_descriptor_set_layout *set_layout = layout->set[s].layout;
for (unsigned s = 0; s < ARRAY_SIZE(layout->set_layouts); s++) {
struct anv_descriptor_set_layout *set_layout = layout->set_layouts[s];
if (!set_layout ||
!(set_layout->vk.flags &
src/intel/vulkan/anv_pipeline.c
+4 -4
View File
@@ -805,9 +805,9 @@ lookup_ycbcr_conversion(const void *_sets_layout, uint32_t set,
const struct anv_pipeline_sets_layout *sets_layout = _sets_layout;
assert(set < MAX_SETS);
assert(binding < sets_layout->set[set].layout->binding_count);
assert(binding < sets_layout->set_layouts[set]->binding_count);
const struct anv_descriptor_set_binding_layout *bind_layout =
&sets_layout->set[set].layout->binding[binding];
&sets_layout->set_layouts[set]->binding[binding];
if (bind_layout->samplers == NULL)
return NULL;
@@ -3004,11 +3004,11 @@ anv_graphics_pipeline_import_sets_layout(struct anv_graphics_base_pipeline *pipe
pipeline->base.layout.independent_sets |= sets_layout->independent_sets;
for (uint32_t s = 0; s < sets_layout->num_sets; s++) {
if (sets_layout->set[s].layout == NULL)
if (sets_layout->set_layouts[s] == NULL)
continue;
anv_pipeline_sets_layout_add(&pipeline->base.layout, s,
sets_layout->set[s].layout);
sets_layout->set_layouts[s]);
}
}
src/intel/vulkan/anv_private.h
+2 -4
View File
@@ -3400,10 +3400,8 @@ struct anv_push_range {
struct anv_pipeline_sets_layout {
struct anv_device *device;
struct {
struct anv_descriptor_set_layout *layout;
uint32_t dynamic_offset_start;
} set[MAX_SETS];
struct anv_descriptor_set_layout *set_layouts[MAX_SETS];
uint32_t dynamic_offset_start[MAX_SETS];
enum anv_descriptor_set_layout_type type;
src/intel/vulkan/genX_cmd_draw.c
+2 -2
View File
@@ -259,8 +259,8 @@ get_push_range_bound_size(struct anv_cmd_buffer *cmd_buffer,
}
case ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER:
return gfx_state->base.pipeline->layout.set[
range->index].layout->descriptor_buffer_surface_size;
return gfx_state->base.pipeline->layout.set_layouts[
range->index]->descriptor_buffer_surface_size;
case ANV_DESCRIPTOR_SET_NULL:
case ANV_DESCRIPTOR_SET_PUSH_CONSTANTS: