freedreno: Consolidate needs_flush and clearing last_fence
Add a helper to both set batch->needs_flush and clear ctx->last_fence so that the two related bits of state do not get out of sync. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10599>
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@@ -460,7 +460,7 @@ fd5_blitter_blit(struct fd_context *ctx,
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}
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fd_resource(info->dst.resource)->valid = true;
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batch->needs_flush = true;
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fd_batch_needs_flush(batch);
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fd_batch_flush(batch);
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fd_batch_reference(&batch, NULL);
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@@ -926,11 +926,11 @@ handle_rgba_blit(struct fd_context *ctx,
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ASSERTED bool ret = fd_batch_lock_submit(batch);
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assert(ret);
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/* Clearing last_fence must come after the batch dependency tracking
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* (resource_read()/resource_write()), as that can trigger a flush,
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* re-populating last_fence
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/* Marking the batch as needing flush must come after the batch
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* dependency tracking (resource_read()/resource_write()), as that
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* can trigger a flush
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*/
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fd_fence_ref(&ctx->last_fence, NULL);
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fd_batch_needs_flush(batch);
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fd_batch_update_queries(batch);
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@@ -965,7 +965,6 @@ handle_rgba_blit(struct fd_context *ctx,
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fd_batch_unlock_submit(batch);
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fd_resource(info->dst.resource)->valid = true;
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batch->needs_flush = true;
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fd_batch_flush(batch);
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fd_batch_reference(&batch, NULL);
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@@ -34,6 +34,7 @@
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#include "util/u_trace.h"
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#include "freedreno_context.h"
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#include "freedreno_fence.h"
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#include "freedreno_util.h"
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#ifdef DEBUG
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@@ -359,6 +360,17 @@ fd_batch_lock_submit(struct fd_batch *batch)
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return ret;
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}
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/**
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* Mark the batch as having something worth flushing (rendering, blit, query,
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* etc)
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*/
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static inline void
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fd_batch_needs_flush(struct fd_batch *batch)
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{
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batch->needs_flush = true;
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fd_fence_ref(&batch->ctx->last_fence, NULL);
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}
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/* Since we reorder batches and can pause/resume queries (notably for disabling
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* queries dueing some meta operations), we update the current query state for
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* the batch before each draw.
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@@ -80,8 +80,6 @@ static void
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fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond,
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bool discard) assert_dt
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{
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fd_fence_ref(&ctx->last_fence, NULL);
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util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vtx.vertexbuf.vb);
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util_blitter_save_vertex_elements(ctx->blitter, ctx->vtx.vtx);
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util_blitter_save_vertex_shader(ctx->blitter, ctx->prog.vs);
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@@ -241,10 +239,11 @@ fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
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.max_index = 1,
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.instance_count = MAX2(1, pfb->layers),
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};
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struct pipe_draw_start_count_bias draw = {
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struct pipe_draw_start_count_bias draw = {
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.count = 2,
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};
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pctx->draw_vbo(pctx, &info, 0, NULL, &draw, 1);
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pctx->draw_vbo(pctx, &info, 0, NULL, &draw, 1);
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/* We expect that this should not have triggered a change in pfb: */
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assert(util_framebuffer_state_equal(pfb, &ctx->framebuffer));
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@@ -240,7 +240,7 @@ fd_emit_string_marker(struct pipe_context *pctx, const char *string,
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struct fd_batch *batch = fd_context_batch_locked(ctx);
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ctx->batch->needs_flush = true;
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fd_batch_needs_flush(batch);
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if (ctx->screen->gpu_id >= 500) {
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fd_emit_string5(batch->draw, string, len);
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@@ -347,11 +347,11 @@ fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
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batch->back_blit = ctx->in_shadow;
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batch->num_draws++;
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/* Clearing last_fence must come after the batch dependency tracking
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* (resource_read()/resource_written()), as that can trigger a flush,
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* re-populating last_fence
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/* Marking the batch as needing flush must come after the batch
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* dependency tracking (resource_read()/resource_write()), as that
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* can trigger a flush
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*/
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fd_fence_ref(&ctx->last_fence, NULL);
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fd_batch_needs_flush(batch);
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struct pipe_framebuffer_state *pfb = &batch->framebuffer;
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DBG("%p: %ux%u num_draws=%u (%s/%s)", batch, pfb->width, pfb->height,
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@@ -362,8 +362,7 @@ fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
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batch->cost += ctx->draw_cost;
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for (unsigned i = 0; i < num_draws; i++) {
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if (ctx->draw_vbo(ctx, info, drawid_offset, indirect, &draws[i], index_offset))
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batch->needs_flush = true;
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ctx->draw_vbo(ctx, info, drawid_offset, indirect, &draws[i], index_offset);
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batch->num_vertices += draws[i].count * info->instance_count;
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}
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@@ -414,7 +413,6 @@ batch_clear_tracking(struct fd_batch *batch, unsigned buffers) assert_dt
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batch->invalidated |= cleared_buffers;
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batch->resolve |= buffers;
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batch->needs_flush = true;
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fd_screen_lock(ctx->screen);
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@@ -468,11 +466,11 @@ fd_clear(struct pipe_context *pctx, unsigned buffers,
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assert(ctx->batch == batch);
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}
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/* Clearing last_fence must come after the batch dependency tracking
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* (resource_read()/resource_written()), as that can trigger a flush,
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* re-populating last_fence
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/* Marking the batch as needing flush must come after the batch
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* dependency tracking (resource_read()/resource_write()), as that
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* can trigger a flush
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*/
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fd_fence_ref(&ctx->last_fence, NULL);
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fd_batch_needs_flush(batch);
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struct pipe_framebuffer_state *pfb = &batch->framebuffer;
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DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers, pfb->width,
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@@ -580,7 +578,7 @@ fd_launch_grid(struct pipe_context *pctx,
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info->block[0], info->block[1], info->block[2],
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info->grid[0], info->grid[1], info->grid[2]);
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batch->needs_flush = true;
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fd_batch_needs_flush(batch);
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ctx->launch_grid(ctx, info);
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fd_batch_flush(batch);
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@@ -279,7 +279,7 @@ fd_fence_set_batch(struct pipe_fence_handle *fence, struct fd_batch *batch)
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if (batch) {
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assert(!fence->batch);
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fence->batch = batch;
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batch->needs_flush = true;
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fd_batch_needs_flush(batch);
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} else {
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fence->batch = NULL;
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@@ -53,7 +53,7 @@ get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring,
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ctx->hw_sample_providers[idx]->get_sample(batch, ring);
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fd_hw_sample_reference(ctx, &batch->sample_cache[idx], new_samp);
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util_dynarray_append(&batch->samples, struct fd_hw_sample *, new_samp);
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batch->needs_flush = true;
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fd_batch_needs_flush(batch);
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}
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fd_hw_sample_reference(ctx, &samp, batch->sample_cache[idx]);
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