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etnaviv: move TS allocation to resource allocation

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Allocate TS together with the tracked resource, which gets rid
of the resource mutation on surface creation and the diversion
between the interal and shared TS handling.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34488>
This commit is contained in:
Lucas Stach
2025-04-01 12:45:47 +02:00
committed by Marge Bot
parent 83ab7a8d58
commit a8009e7c11
2 changed files with 25 additions and 22 deletions
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src/gallium/drivers/etnaviv/etnaviv_resource.c
+25 -4
View File
@@ -107,6 +107,27 @@ etna_resource_is_render_compatible(struct pipe_screen *pscreen,
return true;
}
static bool
etna_resource_can_use_ts(struct etna_screen *screen,
struct etna_resource *rsc)
{
struct pipe_resource *prsc = &rsc->base;
/* GPU capable of using TS */
if (!VIV_FEATURE(screen, ETNA_FEATURE_FAST_CLEAR))
return false;
/* No array layers or 3D slices */
if (prsc->depth0 != 1 || prsc->array_size != 1)
return false;
/* Can be handled by the resolve engine */
if (!etna_resource_hw_tileable(screen->specs.use_blt, prsc))
return false;
return true;
}
/* A tile is either 64 bytes or, when the GPU has the CACHE128B256BPERLINE
* feature, 128/256 bytes of color/depth data, tracked by
* 'screen->specs.bits_per_tile' bits of tile status.
@@ -461,10 +482,10 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
}
}
/* If TS is externally visible set it up now, so it can be exported before
* the first rendering to a surface.
*/
if (etna_resource_ext_ts(rsc))
/* Allocate TS for the resource if it is renderable and may use TS */
if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
etna_resource_is_render_compatible(pscreen, rsc) &&
etna_resource_can_use_ts(screen, rsc))
etna_screen_resource_alloc_ts(pscreen, rsc, modifier);
if (DBG_ENABLED(ETNA_DBG_ZERO)) {
src/gallium/drivers/etnaviv/etnaviv_surface.c
-18
View File
@@ -93,24 +93,6 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
pipe_resource_reference(&surf->base.texture, &rsc->base);
pipe_resource_reference(&surf->prsc, prsc);
/* Allocate a TS for the resource if there isn't one yet,
* and it is allowed by the hw (width is a multiple of 16).
* Avoid doing this for GPUs with MC1.0, as kernel sources
* indicate the tile status module bypasses the memory
* offset and MMU. */
if (VIV_FEATURE(screen, ETNA_FEATURE_FAST_CLEAR) &&
!rsc->ts_bo &&
/* needs to be RS/BLT compatible for transfer_map/unmap */
(rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
(rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0 &&
etna_resource_hw_tileable(screen->specs.use_blt, prsc) &&
/* Multi-layer resources would need to keep much more state (TS valid and
* clear color per layer) and are unlikely to profit from TS usage. */
prsc->depth0 == 1 && prsc->array_size == 1) {
etna_screen_resource_alloc_ts(pctx->screen, rsc, 0);
}
surf->base.format = templat->format;
surf->base.writable = templat->writable; /* what is this for anyway */
surf->base.u = templat->u;