radeonsi: fix tess levels coming as scalar arrays from SPIR-V
This fixes: KHR-GL45.gl_spirv.spirv_modules_positive_test
Fixes: 75ce078a0a "radeonsi: enable NIR by default and document GL 4.6 support"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6460>
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@@ -513,7 +513,7 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi, const struct nir_
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{
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struct si_shader_context *ctx = si_shader_context_from_abi(abi);
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struct si_shader_info *info = &ctx->shader->selector->info;
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const unsigned component = var->data.location_frac;
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unsigned component = var->data.location_frac;
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unsigned driver_location = var->data.driver_location;
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LLVMValueRef dw_addr, stride;
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LLVMValueRef buffer, base, addr;
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@@ -521,6 +521,12 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi, const struct nir_
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bool skip_lds_store;
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bool is_tess_factor = false, is_tess_inner = false;
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if (var->data.compact) {
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component += const_index;
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writemask <<= const_index;
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const_index = 0;
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}
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driver_location = driver_location / 4;
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ubyte name = info->output_semantic_name[driver_location];
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ubyte index = info->output_semantic_index[driver_location];
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