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v3d: writes to magic registers aren't RF writes after THREND

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Shaders must not attempt to write to the register files in the last
three instructions, but that doesn't include the magic registers:

nop                  ; nop               ; thrsw; ldtmu.- *** ERROR ***
nop                  ; nop
nop                  ; nop

v2: Simplify validation rules. (Eric Anholt)
v3: Adjust validation even more. (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Jose Maria Casanova Crespo
2019-07-24 22:01:00 +02:00
parent 1dce75c183
commit a5df0fa0b1
1 changed files with 3 additions and 1 deletions
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src/broadcom/compiler/qpu_validate.c
+3 -1
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@@ -258,8 +258,10 @@ qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
fail_instr(state, "RF write after THREND");
}
if (v3d_qpu_sig_writes_address(devinfo, &inst->sig))
if (v3d_qpu_sig_writes_address(devinfo, &inst->sig) &&
!inst->sig_magic) {
fail_instr(state, "RF write after THREND");
}
/* GFXH-1625: No TMUWT in the last instruction */
if (state->last_thrsw_ip - state->ip == 2 &&