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gv100/ir: fix atom cas

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Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>
This commit is contained in:
Karol Herbst
2020-06-20 13:50:57 +02:00
parent eb6c546493
commit a5445010e4
2 changed files with 3 additions and 1 deletions
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1
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
View File

@@ -858,6 +858,7 @@ CodeEmitterGV100::emitATOM()
break;
}
emitField(73, 3, dType);
emitGPR (64, insn->src(2));
}
emitPRED (81);

3
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
View File

@@ -1727,7 +1727,8 @@ NVC0LoweringPass::handleCasExch(Instruction *cas, bool needCctl)
cctl->setPredicate(cas->cc, cas->getPredicate());
}
if (cas->subOp == NV50_IR_SUBOP_ATOM_CAS) {
if (cas->subOp == NV50_IR_SUBOP_ATOM_CAS &&
targ->getChipset() < NVISA_GV100_CHIPSET) {
// CAS is crazy. It's 2nd source is a double reg, and the 3rd source
// should be set to the high part of the double reg or bad things will
// happen elsewhere in the universe.