freedreno/ir3: Add descriptor set lowering
Add support to lower IBO (image/SSBO) and fb-read to use bindless descriptors. This will be used by a6xx to avoid having to merge image and SSBO state into a single compact IBO descriptor, and also simplify enabling image and SSBO support for additional shader stages (since each stage can use it's own descriptor set). Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
This commit is contained in:
Rob Clark
@@ -0,0 +1,131 @@
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/*
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* Copyright © 2022 Google, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_builder.h"
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#include "ir3/ir3_descriptor.h"
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static bool
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lower_intrinsic(nir_builder *b, nir_intrinsic_instr *intr)
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{
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unsigned desc_offset;
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switch (intr->intrinsic) {
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case nir_intrinsic_load_ssbo:
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case nir_intrinsic_store_ssbo:
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case nir_intrinsic_ssbo_atomic_add:
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case nir_intrinsic_ssbo_atomic_imin:
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case nir_intrinsic_ssbo_atomic_umin:
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case nir_intrinsic_ssbo_atomic_imax:
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case nir_intrinsic_ssbo_atomic_umax:
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case nir_intrinsic_ssbo_atomic_and:
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case nir_intrinsic_ssbo_atomic_or:
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_ssbo_atomic_exchange:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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case nir_intrinsic_ssbo_atomic_fadd:
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case nir_intrinsic_ssbo_atomic_fmin:
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case nir_intrinsic_ssbo_atomic_fmax:
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case nir_intrinsic_ssbo_atomic_fcomp_swap:
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case nir_intrinsic_get_ssbo_size:
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desc_offset = IR3_BINDLESS_SSBO_OFFSET;
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break;
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case nir_intrinsic_image_load:
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case nir_intrinsic_image_store:
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case nir_intrinsic_image_atomic_add:
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case nir_intrinsic_image_atomic_imin:
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case nir_intrinsic_image_atomic_umin:
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case nir_intrinsic_image_atomic_imax:
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case nir_intrinsic_image_atomic_umax:
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case nir_intrinsic_image_atomic_and:
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case nir_intrinsic_image_atomic_or:
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case nir_intrinsic_image_atomic_xor:
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case nir_intrinsic_image_atomic_exchange:
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case nir_intrinsic_image_atomic_comp_swap:
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case nir_intrinsic_image_size:
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case nir_intrinsic_image_samples:
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desc_offset = IR3_BINDLESS_IMAGE_OFFSET;
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break;
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default:
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return false;
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}
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unsigned buffer_src;
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if (intr->intrinsic == nir_intrinsic_store_ssbo) {
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/* store_ssbo has the value first, and ssbo src as 2nd src: */
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buffer_src = 1;
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} else {
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/* the rest have ssbo src as 1st src: */
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buffer_src = 0;
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}
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unsigned set = ir3_shader_descriptor_set(b->shader->info.stage);
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nir_ssa_def *src = nir_ssa_for_src(b, intr->src[buffer_src], 1);
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src = nir_iadd(b, src, nir_imm_int(b, desc_offset));
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/* An out-of-bounds index into an SSBO/image array can cause a GPU fault
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* on access to the descriptor (I don't see any hw mechanism to bound the
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* access). We could just allow the resulting iova fault (it is a read
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* fault, so shouldn't corrupt anything), but at the cost of one extra
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* instruction (as long as IR3_BINDLESS_DESC_COUNT is a power-of-two) we
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* can avoid the dmesg spam and users thinking this is a driver bug:
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*/
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src = nir_umod(b, src, nir_imm_int(b, IR3_BINDLESS_DESC_COUNT));
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nir_ssa_def *bindless = nir_bindless_resource_ir3(b, 32, src, set);
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nir_instr_rewrite_src_ssa(&intr->instr, &intr->src[buffer_src], bindless);
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return true;
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}
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static bool
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lower_instr(nir_builder *b, nir_instr *instr, void *cb_data)
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{
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b->cursor = nir_before_instr(instr);
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switch (instr->type) {
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case nir_instr_type_intrinsic:
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return lower_intrinsic(b, nir_instr_as_intrinsic(instr));
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default:
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return false;
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}
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}
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/**
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* Lower bindful image/SSBO to bindless
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*/
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bool
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ir3_nir_lower_io_to_bindless(nir_shader *shader)
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{
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/* Note: We don't currently support API level bindless, as we assume we
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* can remap bindful images/SSBOs to bindless while controlling the entire
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* descriptor set space.
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*
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* If we needed to support API level bindless, we could probably just remap
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* bindful ops to a range of the descriptor set space that does not conflict
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* with what we advertise for bindless descriptors? But I'm not sure that
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* ARB_bindless_texture is of too much value to care about, especially for
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* GLES
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*/
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assert(!shader->info.uses_bindless);
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return nir_shader_instructions_pass(shader, lower_instr, nir_metadata_none, NULL);
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}
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@@ -0,0 +1,70 @@
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/*
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* Copyright © 2022 Google, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef IR3_DESCRIPTOR_H_
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#define IR3_DESCRIPTOR_H_
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#include "ir3/ir3_shader.h"
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/*
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* When using bindless descriptor sets for image/SSBO (and fb-read) state,
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* since the descriptor sets are large, layout the descriptor set with the
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* first IR3_BINDLESS_SSBO_COUNT slots for SSBOs followed by
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* IR3_BINDLESS_IMAGE_COUNT slots for images. (For fragment shaders, the
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* last image slot is reserved for fb-read tex descriptor.)
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*
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* Note that these limits are more or less arbitrary. But the enable_mask
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* in fd_shaderbuf_stateobj / fd_shaderimg_stateobj would need to be more
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* than uint32_t to support more than 32.
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*/
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#define IR3_BINDLESS_SSBO_OFFSET 0
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#define IR3_BINDLESS_SSBO_COUNT 32
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#define IR3_BINDLESS_IMAGE_OFFSET IR3_BINDLESS_SSBO_COUNT
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#define IR3_BINDLESS_IMAGE_COUNT 32
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#define IR3_BINDLESS_DESC_COUNT (IR3_BINDLESS_IMAGE_OFFSET + IR3_BINDLESS_IMAGE_COUNT)
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/**
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* When using bindless descriptor sets for IBO/etc, each shader stage gets
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* it's own descriptor set, avoiding the need to merge image/ssbo state
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* across shader stages.
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*/
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static inline unsigned
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ir3_shader_descriptor_set(enum pipe_shader_type shader)
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{
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switch (shader) {
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case PIPE_SHADER_VERTEX: return 0;
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case PIPE_SHADER_TESS_CTRL: return 1;
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case PIPE_SHADER_TESS_EVAL: return 2;
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case PIPE_SHADER_GEOMETRY: return 3;
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case PIPE_SHADER_FRAGMENT: return 4;
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case PIPE_SHADER_COMPUTE: return 0;
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default:
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unreachable("bad shader stage");
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return ~0;
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}
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}
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bool ir3_nir_lower_io_to_bindless(nir_shader *shader);
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#endif /* IR3_DESCRIPTOR_H_ */
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@@ -217,6 +217,8 @@ files_libfreedreno = files(
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'ir3/ir3_cache.c',
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'ir3/ir3_cache.h',
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'ir3/ir3_const.h',
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'ir3/ir3_descriptor.c',
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'ir3/ir3_descriptor.h',
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'ir3/ir3_gallium.c',
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'ir3/ir3_gallium.h',
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)
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