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radeonsi: simplify si_num_banks function

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This makes it easier to use.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák
2014-08-18 01:09:31 +02:00
parent db51ab6d6a
commit a333309979
3 changed files with 13 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/radeonsi/si_dma.c
+2 -4
View File
@@ -173,8 +173,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
tile_split = cik_tile_split(rsrc->surface.tile_split);
tile_mode_index = si_tile_mode_index(rsrc, src_level,
util_format_has_stencil(util_format_description(src->format)));
nbanks = si_num_banks(sscreen, rsrc->surface.bpe, rsrc->surface.tile_split,
tile_mode_index);
nbanks = si_num_banks(sscreen, rsrc);
base += rsrc->resource.gpu_address;
addr += rdst->resource.gpu_address;
} else {
@@ -202,8 +201,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
tile_split = cik_tile_split(rdst->surface.tile_split);
tile_mode_index = si_tile_mode_index(rdst, dst_level,
util_format_has_stencil(util_format_description(dst->format)));
nbanks = si_num_banks(sscreen, rdst->surface.bpe, rdst->surface.tile_split,
tile_mode_index);
nbanks = si_num_banks(sscreen, rdst);
base += rdst->resource.gpu_address;
addr += rsrc->resource.gpu_address;
}
src/gallium/drivers/radeonsi/si_state.c
+10 -9
View File
@@ -47,15 +47,14 @@ static void si_init_atom(struct r600_atom *atom, struct r600_atom **list_elem,
*list_elem = atom;
}
uint32_t si_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned tile_split,
unsigned tile_mode_index)
uint32_t si_num_banks(struct si_screen *sscreen, struct r600_texture *tex)
{
if ((sscreen->b.chip_class == CIK) &&
if (sscreen->b.chip_class == CIK &&
sscreen->b.info.cik_macrotile_mode_array_valid) {
unsigned index, tileb;
tileb = 8 * 8 * bpe;
tileb = MIN2(tile_split, tileb);
tileb = 8 * 8 * tex->surface.bpe;
tileb = MIN2(tex->surface.tile_split, tileb);
for (index = 0; tileb > 64; index++) {
tileb >>= 1;
@@ -65,11 +64,14 @@ uint32_t si_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned tile_spl
return (sscreen->b.info.cik_macrotile_mode_array[index] >> 6) & 0x3;
}
if ((sscreen->b.chip_class == SI) &&
if (sscreen->b.chip_class == SI &&
sscreen->b.info.si_tile_mode_array_valid) {
/* Don't use stencil_tiling_index, because num_banks is always
* read from the depth mode. */
unsigned tile_mode_index = tex->surface.tiling_index[0];
assert(tile_mode_index < 32);
return (sscreen->b.info.si_tile_mode_array[tile_mode_index] >> 20) & 0x3;
return G_009910_NUM_BANKS(sscreen->b.info.si_tile_mode_array[tile_mode_index]);
}
/* The old way. */
@@ -1820,8 +1822,7 @@ static void si_init_depth_surface(struct si_context *sctx,
macro_aspect = cik_macro_tile_aspect(macro_aspect);
bankw = cik_bank_wh(bankw);
bankh = cik_bank_wh(bankh);
nbanks = si_num_banks(sscreen, rtex->surface.bpe, rtex->surface.tile_split,
~0);
nbanks = si_num_banks(sscreen, rtex);
tile_mode_index = si_tile_mode_index(rtex, level, false);
pipe_config = cik_db_pipe_config(sscreen, tile_mode_index);
src/gallium/drivers/radeonsi/si_state.h
+1 -2
View File
@@ -263,8 +263,7 @@ unsigned cik_bank_wh(unsigned bankwh);
unsigned cik_db_pipe_config(struct si_screen *sscreen, unsigned tile_mode);
unsigned cik_macro_tile_aspect(unsigned macro_tile_aspect);
unsigned cik_tile_split(unsigned tile_split);
uint32_t si_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned tile_split,
unsigned tile_mode_index);
uint32_t si_num_banks(struct si_screen *sscreen, struct r600_texture *tex);
unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil);
/* si_state_draw.c */