radv: use radeon_set_sh_reg() for only 1 DWORD
It's just shorter to write. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
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@@ -9876,8 +9876,7 @@ radv_emit_userdata_task(const struct radv_cmd_state *cmd_state, struct radeon_cm
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}
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if (draw_id_offset) {
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radeon_set_sh_reg_seq(draw_id_offset, 1);
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radeon_emit(0);
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radeon_set_sh_reg(draw_id_offset, 0);
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}
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radeon_end();
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@@ -10132,8 +10131,7 @@ radv_emit_indirect_mesh_draw_packets(struct radv_cmd_buffer *cmd_buffer, const s
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unsigned reg = state->vtx_base_sgpr + (mesh_shader->info.cs.uses_grid_size ? 12 : 0);
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radeon_begin(cs);
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radeon_set_sh_reg_seq(reg, 1);
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radeon_emit(0);
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radeon_set_sh_reg(reg, 0);
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radeon_end();
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}
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@@ -236,8 +236,7 @@ radeon_check_space(struct radeon_winsys *ws, struct radeon_cmdbuf *cs, unsigned
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#define radeon_emit_32bit_pointer(sh_offset, va, info) \
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do { \
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assert((va) == 0 || ((va) >> 32) == (info)->address32_hi); \
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radeon_set_sh_reg_seq(sh_offset, 1); \
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radeon_emit(va); \
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radeon_set_sh_reg(sh_offset, va); \
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} while (0)
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#define radeon_emit_64bit_pointer(sh_offset, va) \
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