AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

pan/bi: Handle vector moves

Browse Source 
And fix the bad assertion that let this slip.

Like combines, nir_op_vec can be vector, and we need to lower this
ourselves. Thankfully, the lowering is simple.

Fixes
dEQP-GLES2.functional.shaders.loops.for_uniform_iterations.nested_tricky_dataflow_1_*

Fixes: b2c6cf2b6d ("pan/bi: Eliminate writemasks in the IR")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
This commit is contained in:
Alyssa Rosenzweig
2020-10-02 15:49:55 -04:00
parent a22779866a
commit a204eac759
1 changed files with 11 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/panfrost/bifrost/bifrost_compile.c
View File

@@ -763,9 +763,8 @@ emit_alu(bi_context *ctx, nir_alu_instr *instr)
assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
unsigned comps = nir_dest_num_components(instr->dest.dest);
if (alu.type != BI_COMBINE)
assert(comps <= MAX2(1, 32 / comps));
bool vector = comps > MAX2(1, 32 / nir_dest_bit_size(instr->dest.dest));
assert(!vector || alu.type == BI_COMBINE || alu.type == BI_MOV);
if (!instr->dest.dest.is_ssa) {
for (unsigned i = 0; i < comps; ++i)
@@ -926,6 +925,15 @@ emit_alu(bi_context *ctx, nir_alu_instr *instr)
break;
}
if (alu.type == BI_MOV && vector) {
alu.type = BI_COMBINE;
for (unsigned i = 0; i < comps; ++i) {
alu.src[i] = alu.src[0];
alu.swizzle[i][0] = instr->src[0].swizzle[i];
}
}
if (alu.type == BI_CSEL) {
/* Default to csel3 */
alu.cond = BI_COND_NE;