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r600g: align the tiling modes with what the DDX and kernel expects.

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If we see a MACRO bit on r600g its 2D tiled,
if don't see a MACRO bit and we do see a MICRO bit then its 1D tiled.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
2011-02-01 14:22:08 +10:00
parent 8b5a50b31c
commit a112cc283d
1 changed files with 3 additions and 4 deletions
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src/gallium/winsys/r600/drm/r600_bo.c
+3 -4
View File
@@ -95,11 +95,10 @@ struct r600_bo *r600_bo_handle(struct radeon *radeon,
radeon_bo_get_tiling_flags(radeon, rbo, &bo->tiling_flags, &bo->kernel_pitch);
if (array_mode) {
if (bo->tiling_flags) {
if (bo->tiling_flags & RADEON_TILING_MICRO)
*array_mode = V_0280A0_ARRAY_1D_TILED_THIN1;
if ((bo->tiling_flags & (RADEON_TILING_MICRO | RADEON_TILING_MACRO)) ==
(RADEON_TILING_MICRO | RADEON_TILING_MACRO))
if (bo->tiling_flags & RADEON_TILING_MACRO)
*array_mode = V_0280A0_ARRAY_2D_TILED_THIN1;
else if (bo->tiling_flags & RADEON_TILING_MICRO)
*array_mode = V_0280A0_ARRAY_1D_TILED_THIN1;
} else {
*array_mode = 0;
}