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freedreno/ir3: small cleanup and comments

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Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
This commit is contained in:
Rob Clark
2020-03-21 11:06:59 -07:00
committed by Marge Bot
parent 7d9a794f35
commit a0de0db0e4
17 changed files with 77 additions and 71 deletions
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src/freedreno/ir3/ir3_a6xx.c
+1 -1
View File
@@ -385,7 +385,7 @@ ir3_a6xx_fixup_atomic_dests(struct ir3 *ir, struct ir3_shader_variant *so)
foreach_instr_safe (instr, &block->instr_list) {
struct ir3_register *reg;
foreach_src(reg, instr) {
foreach_src (reg, instr) {
struct ir3_instruction *src = reg->instr;
if (!src)
src/freedreno/ir3/ir3_compiler_nir.c
+12 -12
View File
@@ -2428,7 +2428,7 @@ emit_block(struct ir3_context *ctx, nir_block *nblock)
ctx->addr_ht[i] = NULL;
}
nir_foreach_instr(instr, nblock) {
nir_foreach_instr (instr, nblock) {
ctx->cur_instr = instr;
emit_instr(ctx, instr);
ctx->cur_instr = NULL;
@@ -2475,7 +2475,7 @@ stack_pop(struct ir3_context *ctx)
static void
emit_cf_list(struct ir3_context *ctx, struct exec_list *list)
{
foreach_list_typed(nir_cf_node, node, node, list) {
foreach_list_typed (nir_cf_node, node, node, list) {
switch (node->type) {
case nir_cf_node_block:
emit_block(ctx, nir_cf_node_as_block(node));
@@ -2756,7 +2756,7 @@ setup_input(struct ir3_context *ctx, nir_variable *in)
struct ir3_instruction *components[4];
unsigned mask = (1 << (ncomp + frac)) - 1;
foreach_input(in, ctx->ir) {
foreach_input (in, ctx->ir) {
if (in->input.inidx == n) {
input = in;
break;
@@ -2984,7 +2984,7 @@ static int
max_drvloc(struct exec_list *vars)
{
int drvloc = -1;
nir_foreach_variable(var, vars) {
nir_foreach_variable (var, vars) {
drvloc = MAX2(drvloc, (int)var->data.driver_location);
}
return drvloc;
@@ -3028,7 +3028,7 @@ emit_instructions(struct ir3_context *ctx)
}
/* Setup inputs: */
nir_foreach_variable(var, &ctx->s->inputs) {
nir_foreach_variable (var, &ctx->s->inputs) {
setup_input(ctx, var);
}
@@ -3076,12 +3076,12 @@ emit_instructions(struct ir3_context *ctx)
}
/* Setup outputs: */
nir_foreach_variable(var, &ctx->s->outputs) {
nir_foreach_variable (var, &ctx->s->outputs) {
setup_output(ctx, var);
}
/* Find # of samplers: */
nir_foreach_variable(var, &ctx->s->uniforms) {
nir_foreach_variable (var, &ctx->s->uniforms) {
ctx->so->num_samp += glsl_type_get_sampler_count(var->type);
/* just assume that we'll be reading from images.. if it
* is write-only we don't have to count it, but not sure
@@ -3091,7 +3091,7 @@ emit_instructions(struct ir3_context *ctx)
}
/* NOTE: need to do something more clever when we support >1 fxn */
nir_foreach_register(reg, &fxn->registers) {
nir_foreach_register (reg, &fxn->registers) {
ir3_declare_array(ctx, reg);
}
/* And emit the body: */
@@ -3167,7 +3167,7 @@ fixup_binning_pass(struct ir3_context *ctx)
/* fixup outidx to point to new output table entry: */
struct ir3_instruction *out;
foreach_output(out, ir) {
foreach_output (out, ir) {
if (out->collect.outidx == i) {
out->collect.outidx = j;
break;
@@ -3438,7 +3438,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
struct ir3_instruction *instr, *precolor[2];
int idx = 0;
foreach_input(instr, ir) {
foreach_input (instr, ir) {
if (instr->input.sysval != SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL)
continue;
@@ -3486,7 +3486,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
so->outputs[i].regid = INVALID_REG;
struct ir3_instruction *out;
foreach_output(out, ir) {
foreach_output (out, ir) {
assert(out->opc == OPC_META_COLLECT);
unsigned outidx = out->collect.outidx;
@@ -3495,7 +3495,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
}
struct ir3_instruction *in;
foreach_input(in, ir) {
foreach_input (in, ir) {
assert(in->opc == OPC_META_INPUT);
unsigned inidx = in->input.inidx;
src/freedreno/ir3/ir3_cp.c
+3 -3
View File
@@ -643,7 +643,7 @@ instr_cp(struct ir3_cp_ctx *ctx, struct ir3_instruction *instr)
bool progress;
do {
progress = false;
foreach_src_n(reg, n, instr) {
foreach_src_n (reg, n, instr) {
struct ir3_instruction *src = ssa(reg);
if (!src)
@@ -767,7 +767,7 @@ ir3_cp(struct ir3 *ir, struct ir3_shader_variant *so)
*/
debug_assert(instr->deps_count == 0);
foreach_ssa_src(src, instr) {
foreach_ssa_src (src, instr) {
src->use_count++;
}
}
@@ -776,7 +776,7 @@ ir3_cp(struct ir3 *ir, struct ir3_shader_variant *so)
ir3_clear_mark(ir);
struct ir3_instruction *out;
foreach_output_n(out, n, ir) {
foreach_output_n (out, n, ir) {
instr_cp(&ctx, out);
ir->outputs[n] = eliminate_output_mov(out);
}
src/freedreno/ir3/ir3_depth.c
+3 -3
View File
@@ -79,7 +79,7 @@ ir3_instr_depth(struct ir3_instruction *instr, unsigned boost, bool falsedep)
instr->depth = 0;
foreach_ssa_src_n(src, i, instr) {
foreach_ssa_src_n (src, i, instr) {
unsigned sd;
/* visit child to compute it's depth: */
@@ -165,7 +165,7 @@ compute_depth_and_remove_unused(struct ir3 *ir, struct ir3_shader_variant *so)
}
struct ir3_instruction *out;
foreach_output(out, ir)
foreach_output (out, ir)
ir3_instr_depth(out, 0, false);
foreach_block (block, &ir->block_list) {
@@ -193,7 +193,7 @@ compute_depth_and_remove_unused(struct ir3 *ir, struct ir3_shader_variant *so)
/* cleanup unused inputs: */
struct ir3_instruction *in;
foreach_input_n(in, n, ir)
foreach_input_n (in, n, ir)
if (in->flags & IR3_INSTR_UNUSED)
ir->inputs[n] = NULL;
src/freedreno/ir3/ir3_group.c
+2 -2
View File
@@ -153,7 +153,7 @@ instr_find_neighbors(struct ir3_instruction *instr)
if (instr->opc == OPC_META_COLLECT)
group_n(&instr_ops, instr, instr->regs_count - 1);
foreach_ssa_src(src, instr)
foreach_ssa_src (src, instr)
instr_find_neighbors(src);
}
@@ -163,7 +163,7 @@ find_neighbors(struct ir3 *ir)
unsigned i;
struct ir3_instruction *out;
foreach_output(out, ir)
foreach_output (out, ir)
instr_find_neighbors(out);
foreach_block (block, &ir->block_list) {
src/freedreno/ir3/ir3_legalize.c
+1 -1
View File
@@ -274,7 +274,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
* their src register(s):
*/
if (is_tex(n) || is_sfu(n) || is_mem(n)) {
foreach_src(reg, n) {
foreach_src (reg, n) {
if (reg_gpr(reg))
regmask_set(&state->needs_ss_war, reg);
}
src/freedreno/ir3/ir3_nir.c
+3 -3
View File
@@ -359,12 +359,12 @@ static void
ir3_nir_scan_driver_consts(nir_shader *shader,
struct ir3_const_state *layout)
{
nir_foreach_function(function, shader) {
nir_foreach_function (function, shader) {
if (!function->impl)
continue;
nir_foreach_block(block, function->impl) {
nir_foreach_instr(instr, block) {
nir_foreach_block (block, function->impl) {
nir_foreach_instr (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c
+6 -6
View File
@@ -214,10 +214,10 @@ ir3_nir_analyze_ubo_ranges(nir_shader *nir, struct ir3_shader *shader)
memset(state, 0, sizeof(*state));
nir_foreach_function(function, nir) {
nir_foreach_function (function, nir) {
if (function->impl) {
nir_foreach_block(block, function->impl) {
nir_foreach_instr(instr, block) {
nir_foreach_block (block, function->impl) {
nir_foreach_instr (instr, block) {
if (instr->type == nir_instr_type_intrinsic &&
nir_instr_as_intrinsic(instr)->intrinsic == nir_intrinsic_load_ubo)
gather_ubo_ranges(nir, nir_instr_as_intrinsic(instr), state);
@@ -252,12 +252,12 @@ ir3_nir_analyze_ubo_ranges(nir_shader *nir, struct ir3_shader *shader)
}
state->size = offset;
nir_foreach_function(function, nir) {
nir_foreach_function (function, nir) {
if (function->impl) {
nir_builder builder;
nir_builder_init(&builder, function->impl);
nir_foreach_block(block, function->impl) {
nir_foreach_instr_safe(instr, block) {
nir_foreach_block (block, function->impl) {
nir_foreach_instr_safe (instr, block) {
if (instr->type == nir_instr_type_intrinsic &&
nir_instr_as_intrinsic(instr)->intrinsic == nir_intrinsic_load_ubo)
lower_ubo_load_to_uniform(nir_instr_as_intrinsic(instr), &builder, state);
src/freedreno/ir3/ir3_nir_lower_io_offsets.c
+3 -3
View File
@@ -255,7 +255,7 @@ lower_io_offsets_block(nir_block *block, nir_builder *b, void *mem_ctx)
{
bool progress = false;
nir_foreach_instr_safe(instr, block) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@@ -283,7 +283,7 @@ lower_io_offsets_func(nir_function_impl *impl)
nir_builder_init(&b, impl);
bool progress = false;
nir_foreach_block_safe(block, impl) {
nir_foreach_block_safe (block, impl) {
progress |= lower_io_offsets_block(block, &b, mem_ctx);
}
@@ -300,7 +300,7 @@ ir3_nir_lower_io_offsets(nir_shader *shader)
{
bool progress = false;
nir_foreach_function(function, shader) {
nir_foreach_function (function, shader) {
if (function->impl)
progress |= lower_io_offsets_func(function->impl);
}
src/freedreno/ir3/ir3_nir_lower_tess.c
+14 -14
View File
@@ -75,7 +75,7 @@ build_local_primitive_id(nir_builder *b, struct state *state)
static nir_variable *
get_var(struct exec_list *list, int driver_location)
{
nir_foreach_variable(v, list) {
nir_foreach_variable (v, list) {
if (v->data.driver_location == driver_location) {
return v;
}
@@ -147,7 +147,7 @@ replace_intrinsic(nir_builder *b, nir_intrinsic_instr *intr,
static void
build_primitive_map(nir_shader *shader, struct primitive_map *map, struct exec_list *list)
{
nir_foreach_variable(var, list) {
nir_foreach_variable (var, list) {
switch (var->data.location) {
case VARYING_SLOT_TESS_LEVEL_OUTER:
case VARYING_SLOT_TESS_LEVEL_INNER:
@@ -181,7 +181,7 @@ build_primitive_map(nir_shader *shader, struct primitive_map *map, struct exec_l
static void
lower_vs_block(nir_block *block, nir_builder *b, struct state *state)
{
nir_foreach_instr_safe(instr, block) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@@ -241,7 +241,7 @@ ir3_nir_lower_to_explicit_io(nir_shader *shader, struct ir3_shader *s, unsigned
else
state.header = nir_load_gs_header_ir3(&b);
nir_foreach_block_safe(block, impl)
nir_foreach_block_safe (block, impl)
lower_vs_block(block, &b, &state);
nir_metadata_preserve(impl, nir_metadata_block_index |
@@ -332,7 +332,7 @@ build_tessfactor_base(nir_builder *b, gl_varying_slot slot, struct state *state)
static void
lower_tess_ctrl_block(nir_block *block, nir_builder *b, struct state *state)
{
nir_foreach_instr_safe(instr, block) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@@ -565,7 +565,7 @@ ir3_nir_lower_tess_ctrl(nir_shader *shader, struct ir3_shader *s, unsigned topol
state.header = nir_load_tcs_header_ir3(&b);
nir_foreach_block_safe(block, impl)
nir_foreach_block_safe (block, impl)
lower_tess_ctrl_block(block, &b, &state);
/* Now move the body of the TCS into a conditional:
@@ -612,7 +612,7 @@ ir3_nir_lower_tess_ctrl(nir_shader *shader, struct ir3_shader *s, unsigned topol
static void
lower_tess_eval_block(nir_block *block, nir_builder *b, struct state *state)
{
nir_foreach_instr_safe(instr, block) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@@ -734,7 +734,7 @@ ir3_nir_lower_tess_eval(nir_shader *shader, unsigned topology)
nir_builder b;
nir_builder_init(&b, impl);
nir_foreach_block_safe(block, impl)
nir_foreach_block_safe (block, impl)
lower_tess_eval_block(block, &b, &state);
nir_metadata_preserve(impl, 0);
@@ -745,7 +745,7 @@ lower_gs_block(nir_block *block, nir_builder *b, struct state *state)
{
nir_intrinsic_instr *outputs[32] = {};
nir_foreach_instr_safe(instr, block) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@@ -859,13 +859,13 @@ clean_up_split_vars(nir_shader *shader, struct exec_list *list)
{
uint32_t components[32] = {};
nir_foreach_variable(var, list) {
nir_foreach_variable (var, list) {
uint32_t mask =
((1 << glsl_get_components(glsl_without_array(var->type))) - 1) << var->data.location_frac;
components[var->data.driver_location] |= mask;
}
nir_foreach_variable_safe(var, list) {
nir_foreach_variable_safe (var, list) {
uint32_t mask =
((1 << glsl_get_components(glsl_without_array(var->type))) - 1) << var->data.location_frac;
bool subset =
@@ -891,7 +891,7 @@ ir3_nir_lower_gs(nir_shader *shader, struct ir3_shader *s)
build_primitive_map(shader, &state.map, &shader->inputs);
uint32_t loc = 0;
nir_foreach_variable(var, &shader->outputs) {
nir_foreach_variable (var, &shader->outputs) {
uint32_t end = var->data.driver_location + glsl_count_attribute_slots(var->type, false);
loc = MAX2(loc, end);
}
@@ -910,7 +910,7 @@ ir3_nir_lower_gs(nir_shader *shader, struct ir3_shader *s)
state.header = nir_load_gs_header_ir3(&b);
nir_foreach_variable(var, &shader->outputs) {
nir_foreach_variable (var, &shader->outputs) {
state.output_vars[var->data.driver_location] =
nir_local_variable_create(impl, var->type,
ralloc_asprintf(var, "%s:gs-temp", var->name));
@@ -930,7 +930,7 @@ ir3_nir_lower_gs(nir_shader *shader, struct ir3_shader *s)
nir_store_var(&b, state.emitted_vertex_var, nir_imm_int(&b, 0), 0x1);
nir_store_var(&b, state.vertex_flags_var, nir_imm_int(&b, 4), 0x1);
nir_foreach_block_safe(block, impl)
nir_foreach_block_safe (block, impl)
lower_gs_block(block, &b, &state);
set_foreach(impl->end_block->predecessors, block_entry) {
src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c
+2 -2
View File
@@ -115,7 +115,7 @@ lower_tex_prefetch_block(nir_block *block)
{
bool progress = false;
nir_foreach_instr_safe(instr, block) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_tex)
continue;
@@ -183,7 +183,7 @@ ir3_nir_lower_tex_prefetch(nir_shader *shader)
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
nir_foreach_function(function, shader) {
nir_foreach_function (function, shader) {
/* Only texture sampling instructions inside the main function
* are eligible for pre-dispatch.
*/
src/freedreno/ir3/ir3_nir_move_varying_inputs.c
+1 -1
View File
@@ -83,7 +83,7 @@ move_varying_inputs_block(state *state, nir_block *block)
{
bool progress = false;
nir_foreach_instr_safe(instr, block) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
src/freedreno/ir3/ir3_print.c
+1 -1
View File
@@ -322,7 +322,7 @@ ir3_print(struct ir3 *ir)
print_block(block, 0);
struct ir3_instruction *out;
foreach_output_n(out, i, ir) {
foreach_output_n (out, i, ir) {
printf("out%d: ", i);
print_instr(out, 0);
}
src/freedreno/ir3/ir3_ra.c
+10 -4
View File
@@ -976,7 +976,7 @@ ra_block_compute_live_ranges(struct ir3_ra_ctx *ctx, struct ir3_block *block)
}
}
foreach_src(reg, instr) {
foreach_src (reg, instr) {
if (reg->flags & IR3_REG_ARRAY) {
struct ir3_array *arr =
ir3_lookup_array(ctx->ir, reg->array.id);
@@ -1028,7 +1028,7 @@ ra_block_compute_live_ranges(struct ir3_ra_ctx *ctx, struct ir3_block *block)
* component. This shows up in splits coming out of
* a tex instruction w/ wrmask=.z, for example.
*/
if (ctx->scalar_pass && (instr->opc == OPC_META_SPLIT) &&
if ((instr->opc == OPC_META_SPLIT) &&
!(i == instr->split.off))
continue;
@@ -1053,6 +1053,9 @@ ra_compute_livein_liveout(struct ir3_ra_ctx *ctx)
/* update livein: */
for (unsigned i = 0; i < bitset_words; i++) {
/* anything used but not def'd within a block is
* by definition a live value coming into the block:
*/
BITSET_WORD new_livein =
(bd->use[i] | (bd->liveout[i] & ~bd->def[i]));
@@ -1073,6 +1076,9 @@ ra_compute_livein_liveout(struct ir3_ra_ctx *ctx)
succ_bd = succ->data;
for (unsigned i = 0; i < bitset_words; i++) {
/* add anything that is livein in a successor block
* to our liveout:
*/
BITSET_WORD new_liveout =
(succ_bd->livein[i] & ~bd->liveout[i]);
@@ -1186,7 +1192,7 @@ ra_add_interference(struct ir3_ra_ctx *ctx)
/* need to fix things up to keep outputs live: */
struct ir3_instruction *out;
foreach_output(out, ir) {
foreach_output (out, ir) {
unsigned name = ra_name(ctx, &ctx->instrd[out->ip]);
ctx->use[name] = ctx->instr_cnt;
}
@@ -1388,7 +1394,7 @@ ra_block_alloc(struct ir3_ra_ctx *ctx, struct ir3_block *block)
}
}
foreach_src_n(reg, n, instr) {
foreach_src_n (reg, n, instr) {
struct ir3_instruction *src = reg->instr;
if (src && !should_assign(ctx, src) && !should_assign(ctx, instr))
src/freedreno/ir3/ir3_sched.c
+8 -8
View File
@@ -90,7 +90,7 @@ unuse_each_src(struct ir3_sched_ctx *ctx, struct ir3_instruction *instr)
{
struct ir3_instruction *src;
foreach_ssa_src_n(src, n, instr) {
foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
if (instr->block != src->block)
@@ -129,7 +129,7 @@ transfer_use(struct ir3_sched_ctx *ctx, struct ir3_instruction *orig_instr,
debug_assert(is_scheduled(orig_instr));
foreach_ssa_src_n(src, n, new_instr) {
foreach_ssa_src_n (src, n, new_instr) {
if (__is_false_dep(new_instr, n))
continue;
if (is_half(new_instr)) {
@@ -148,7 +148,7 @@ use_each_src(struct ir3_instruction *instr)
{
struct ir3_instruction *src;
foreach_ssa_src_n(src, n, instr) {
foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
use_instr(src);
@@ -201,7 +201,7 @@ update_use_count(struct ir3 *ir)
/* Shader outputs are also used:
*/
struct ir3_instruction *out;
foreach_output(out, ir)
foreach_output (out, ir)
use_instr(out);
}
@@ -289,7 +289,7 @@ static bool
could_sched(struct ir3_instruction *instr, struct ir3_instruction *src)
{
struct ir3_instruction *other_src;
foreach_ssa_src(other_src, instr) {
foreach_ssa_src (other_src, instr) {
/* if dependency not scheduled, we aren't ready yet: */
if ((src != other_src) && !is_scheduled(other_src)) {
return false;
@@ -403,7 +403,7 @@ find_instr_recursive(struct ir3_sched_ctx *ctx, struct ir3_sched_notes *notes,
}
/* find unscheduled srcs: */
foreach_ssa_src(src, instr) {
foreach_ssa_src (src, instr) {
if (!is_scheduled(src) && (src->block == instr->block)) {
debug_assert(nsrcs < ARRAY_SIZE(srcs));
srcs[nsrcs++] = src;
@@ -444,7 +444,7 @@ live_effect(struct ir3_instruction *instr)
int new_live = dest_regs(instr);
int old_live = 0;
foreach_ssa_src_n(src, n, instr) {
foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
@@ -463,7 +463,7 @@ live_effect(struct ir3_instruction *instr)
struct ir3_instruction *src2;
bool last_use = true;
foreach_ssa_src(src2, src) {
foreach_ssa_src (src2, src) {
if (src2->use_count > 1) {
last_use = false;
break;
src/freedreno/ir3/ir3_shader.c
+5 -5
View File
@@ -287,7 +287,7 @@ ir3_shader_destroy(struct ir3_shader *shader)
static bool
lower_output_var(nir_shader *nir, int location)
{
nir_foreach_variable(var, &nir->outputs) {
nir_foreach_variable (var, &nir->outputs) {
if (var->data.driver_location == location &&
((var->data.precision == GLSL_PRECISION_MEDIUM) ||
(var->data.precision == GLSL_PRECISION_LOW))) {
@@ -313,8 +313,8 @@ lower_mediump_outputs(nir_shader *nir)
nir_builder b;
nir_builder_init(&b, impl);
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
nir_foreach_block_safe (block, impl) {
nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@@ -434,7 +434,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
unsigned i;
struct ir3_instruction *instr;
foreach_input_n(instr, i, ir) {
foreach_input_n (instr, i, ir) {
reg = instr->regs[0];
regid = reg->num;
fprintf(out, "@in(%sr%d.%c)\tin%d",
@@ -456,7 +456,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
fetch->wrmask, fetch->cmd);
}
foreach_output_n(instr, i, ir) {
foreach_output_n (instr, i, ir) {
reg = instr->regs[0];
regid = reg->num;
fprintf(out, "@out(%sr%d.%c)\tout%d",
src/freedreno/ir3/ir3_sun.c
+2 -2
View File
@@ -56,7 +56,7 @@ number_instr(struct ir3_instruction *instr)
/* TODO I think including false-deps in the calculation is the right
* thing to do:
*/
foreach_ssa_src_n(src, n, instr) {
foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
if (src->block != instr->block) {
@@ -97,7 +97,7 @@ ir3_sun(struct ir3 *ir)
ir3_clear_mark(ir);
struct ir3_instruction *out;
foreach_output(out, ir)
foreach_output (out, ir)
max = MAX2(max, number_instr(out));
foreach_block (block, &ir->block_list) {