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freedreno/ir3: add TXL support

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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Ilia Mirkin
2014-09-10 00:59:30 -04:00
committed by Rob Clark
parent 459f8f3d66
commit 9f5bd154d7
1 changed files with 3 additions and 1 deletions
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src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+3 -1
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@@ -1145,6 +1145,7 @@ get_tex_info(struct ir3_compile_context *ctx,
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_TEX:
case TGSI_OPCODE_TXB:
case TGSI_OPCODE_TXL:
switch (tex) {
case TGSI_TEXTURE_1D:
return &tex1d;
@@ -1289,7 +1290,7 @@ trans_samp(const struct instr_translater *t,
add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask);
add_src_reg_wrmask(ctx, instr, coord, coord->SwizzleX, tinf->src_wrmask);
if (t->tgsi_opc == TGSI_OPCODE_TXB)
if (t->opc != OPC_SAM)
add_src_reg_wrmask(ctx, instr, coord, coord->SwizzleW, 0x1);
}
@@ -2093,6 +2094,7 @@ static const struct instr_translater translaters[TGSI_OPCODE_LAST] = {
INSTR(TEX, trans_samp, .opc = OPC_SAM, .arg = TGSI_OPCODE_TEX),
INSTR(TXP, trans_samp, .opc = OPC_SAM, .arg = TGSI_OPCODE_TXP),
INSTR(TXB, trans_samp, .opc = OPC_SAMB, .arg = TGSI_OPCODE_TXB),
INSTR(TXL, trans_samp, .opc = OPC_SAML, .arg = TGSI_OPCODE_TXL),
INSTR(DDX, trans_deriv, .opc = OPC_DSX),
INSTR(DDY, trans_deriv, .opc = OPC_DSY),
INSTR(SGT, trans_cmp),