radv: store the primitive topology hardware value in the pipeline
Will help for upcoming changes. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
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@@ -1332,7 +1332,7 @@ radv_emit_line_stipple(struct radv_cmd_buffer *cmd_buffer)
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struct radv_pipeline *pipeline = cmd_buffer->state.pipeline;
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uint32_t auto_reset_cntl = 1;
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if (pipeline->graphics.topology == VK_PRIMITIVE_TOPOLOGY_LINE_STRIP)
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if (pipeline->graphics.topology == V_008958_DI_PT_LINESTRIP)
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auto_reset_cntl = 2;
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radeon_set_context_reg(cmd_buffer->cs, R_028A0C_PA_SC_LINE_STIPPLE,
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@@ -5063,7 +5063,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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uint32_t gs_out;
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uint32_t prim = si_translate_prim(pCreateInfo->pInputAssemblyState->topology);
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pipeline->graphics.topology = pCreateInfo->pInputAssemblyState->topology;
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pipeline->graphics.topology = si_translate_prim(pCreateInfo->pInputAssemblyState->topology);
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pipeline->graphics.can_use_guardband = radv_prim_can_use_guardband(pCreateInfo->pInputAssemblyState->topology);
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if (radv_pipeline_has_gs(pipeline)) {
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