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radeon/llvm: use floor intrinsic instead of llvm.AMDIL.floor

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Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
This commit is contained in:
Vincent Lejeune
2012-10-08 15:34:36 +02:00
parent bfdf26892c
commit 9a6bb3f645
5 changed files with 5 additions and 5 deletions
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src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
+1
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@@ -37,6 +37,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FPOW, MVT::f32, Legal);
setOperationAction(ISD::FLOG2, MVT::f32, Legal);
setOperationAction(ISD::FABS, MVT::f32, Legal);
setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
setOperationAction(ISD::FRINT, MVT::f32, Legal);
setOperationAction(ISD::UDIV, MVT::i32, Expand);
src/gallium/drivers/radeon/AMDGPUIntrinsics.td
-1
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@@ -23,7 +23,6 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in {
def int_AMDGPU_cndlt : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_div : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_dp4 : Intrinsic<[llvm_float_ty], [llvm_v4f32_ty, llvm_v4f32_ty], [IntrNoMem]>;
def int_AMDGPU_floor : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_kill : Intrinsic<[], [llvm_float_ty], []>;
def int_AMDGPU_kilp : Intrinsic<[], [], []>;
def int_AMDGPU_lrp : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
src/gallium/drivers/radeon/R600Instructions.td
+1 -1
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@@ -399,7 +399,7 @@ def RNDNE : R600_1OP <
def FLOOR : R600_1OP <
0x14, "FLOOR",
[(set R600_Reg32:$dst, (int_AMDGPU_floor R600_Reg32:$src))]
[(set R600_Reg32:$dst, (ffloor R600_Reg32:$src))]
>;
def MOV : InstR600 <0x19, (outs R600_Reg32:$dst),
src/gallium/drivers/radeon/SIInstructions.td
+1 -1
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@@ -541,7 +541,7 @@ defm V_RNDNE_F32 : VOP1_32 <0x00000023, "V_RNDNE_F32",
[(set VReg_32:$dst, (frint AllReg_32:$src0))]
>;
defm V_FLOOR_F32 : VOP1_32 <0x00000024, "V_FLOOR_F32",
[(set VReg_32:$dst, (int_AMDGPU_floor AllReg_32:$src0))]
[(set VReg_32:$dst, (ffloor AllReg_32:$src0))]
>;
defm V_EXP_F32 : VOP1_32 <0x00000025, "V_EXP_F32",
[(set VReg_32:$dst, (fexp2 AllReg_32:$src0))]
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+2 -2
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@@ -1142,8 +1142,8 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
bld_base->op_actions[TGSI_OPCODE_ENDLOOP].emit = endloop_emit;
bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.AMDIL.exp.";
bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.AMDGPU.floor";
bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_readonly;
bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "floor";
bld_base->op_actions[TGSI_OPCODE_FRC].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_FRC].intr_name = "llvm.AMDIL.fraction.";
bld_base->op_actions[TGSI_OPCODE_IF].emit = if_emit;