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intel/isl: Fill out the correct phys_total_extent for Ys/Yf/Tile64

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With these tilings, everything is aligned to a tile and the tiled
surface size calculations will handle the array stride for us.  We need
to provide an accurate 4D size so that 3D and multisampled images get
tiled correctly.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
This commit is contained in:
Jason Ekstrand
2018-02-21 18:12:30 -08:00
committed by Marge Bot
parent 9421998e95
commit 9a4e9848ad
1 changed files with 2 additions and 5 deletions
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src/intel/isl/isl.c
+2 -5
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@@ -1197,10 +1197,6 @@ isl_calc_phys_level0_extent_sa(const struct isl_device *dev,
assert(dim_layout == ISL_DIM_LAYOUT_GFX4_2D ||
dim_layout == ISL_DIM_LAYOUT_GFX6_STENCIL_HIZ);
if ((tiling == ISL_TILING_SKL_Ys ||
tiling == ISL_TILING_ICL_Ys) && info->samples > 1)
isl_finishme("%s:%s: multisample TileYs layout", __FILE__, __func__);
switch (msaa_layout) {
case ISL_MSAA_LAYOUT_NONE:
assert(info->depth == 1);
@@ -1475,7 +1471,8 @@ isl_calc_phys_total_extent_el_gfx4_2d(
array_pitch_span,
&phys_slice0_sa);
if (tile_info->tiling == ISL_TILING_64) {
if (tile_info->tiling == ISL_TILING_64 ||
isl_tiling_is_std_y(tile_info->tiling)) {
*phys_total_el = (struct isl_extent4d) {
.w = isl_align_div_npot(phys_slice0_sa.w, fmtl->bw),
.h = isl_align_div_npot(phys_slice0_sa.h, fmtl->bh),