i965/vec4: Simplify opt_register_coalesce() using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
@@ -1040,22 +1040,10 @@ vec4_visitor::opt_register_coalesce()
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* we're eliminating. To do that, keep track of which of our source
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* channels we've seen initialized.
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*/
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bool chans_needed[4] = {false, false, false, false};
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int chans_remaining = 0;
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int swizzle_mask = 0;
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for (int i = 0; i < 4; i++) {
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int chan = BRW_GET_SWZ(inst->src[0].swizzle, i);
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if (!(inst->dst.writemask & (1 << i)))
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continue;
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swizzle_mask |= (1 << chan);
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if (!chans_needed[chan]) {
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chans_needed[chan] = true;
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chans_remaining++;
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}
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}
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const unsigned chans_needed =
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brw_apply_inv_swizzle_to_mask(inst->src[0].swizzle,
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inst->dst.writemask);
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unsigned chans_remaining = chans_needed;
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/* Now walk up the instruction stream trying to see if we can rewrite
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* everything writing to the temporary to write into the destination
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@@ -1088,20 +1076,13 @@ vec4_visitor::opt_register_coalesce()
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/* If we can't handle the swizzle, bail. */
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if (!scan_inst->can_reswizzle(inst->dst.writemask,
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inst->src[0].swizzle,
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swizzle_mask)) {
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chans_needed)) {
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break;
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}
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/* Mark which channels we found unconditional writes for. */
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if (!scan_inst->predicate) {
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for (int i = 0; i < 4; i++) {
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if (scan_inst->dst.writemask & (1 << i) &&
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chans_needed[i]) {
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chans_needed[i] = false;
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chans_remaining--;
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}
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}
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}
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if (!scan_inst->predicate)
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chans_remaining &= ~scan_inst->dst.writemask;
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if (chans_remaining == 0)
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break;
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