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radeonsi: disable SPI color outputs the shader doesn't write

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
2016-01-15 21:58:53 +01:00
parent f6360de8c0
commit 99dfeb01bd
2 changed files with 16 additions and 0 deletions
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src/gallium/drivers/radeonsi/si_shader.h
+4
View File
@@ -213,6 +213,10 @@ struct si_shader_selector {
/* PS parameters. */
unsigned db_shader_control;
/* Set 0xf or 0x0 (4 bits) per each written output.
* ANDed with spi_shader_col_format.
*/
unsigned colors_written_4bit;
/* masks of "get_unique_index" bits */
uint64_t outputs_written;
src/gallium/drivers/radeonsi/si_state_shaders.c
+12
View File
@@ -647,6 +647,12 @@ static inline void si_shader_selector_key(struct pipe_context *ctx,
if (sctx->b.chip_class <= CIK && sctx->b.family != CHIP_HAWAII)
key->ps.color_is_int8 = sctx->framebuffer.color_is_int8;
/* Disable unwritten outputs (if WRITE_ALL_CBUFS isn't enabled). */
if (!key->ps.last_cbuf) {
key->ps.spi_shader_col_format &= sel->colors_written_4bit;
key->ps.color_is_int8 &= sel->info.colors_written;
}
if (rs) {
bool is_poly = (sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES &&
sctx->current_rast_prim <= PIPE_PRIM_POLYGON) ||
@@ -831,6 +837,12 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
}
sel->esgs_itemsize = util_last_bit64(sel->outputs_written) * 16;
break;
case PIPE_SHADER_FRAGMENT:
for (i = 0; i < 8; i++)
if (sel->info.colors_written & (1 << i))
sel->colors_written_4bit |= 0xf << (4 * i);
break;
}
/* DB_SHADER_CONTROL */