i965/miptree: Tighten up finish_mcs_write
Multisample surfaces only have a single miplevel so there's no reason to be passing the extra parameters around. It only leads to confusion. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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@@ -2079,18 +2079,18 @@ intel_miptree_finish_ccs_write(struct brw_context *brw,
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static void
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intel_miptree_finish_mcs_write(struct brw_context *brw,
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struct intel_mipmap_tree *mt,
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uint32_t level, uint32_t layer,
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bool written_with_aux)
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uint32_t layer,
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bool written_with_mcs)
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{
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switch (intel_miptree_get_aux_state(mt, level, layer)) {
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switch (intel_miptree_get_aux_state(mt, 0, layer)) {
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case ISL_AUX_STATE_CLEAR:
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assert(written_with_aux);
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intel_miptree_set_aux_state(brw, mt, level, layer, 1,
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assert(written_with_mcs);
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intel_miptree_set_aux_state(brw, mt, 0, layer, 1,
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ISL_AUX_STATE_COMPRESSED_CLEAR);
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break;
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case ISL_AUX_STATE_COMPRESSED_CLEAR:
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assert(written_with_aux);
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assert(written_with_mcs);
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break; /* Nothing to do */
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case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
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@@ -2288,8 +2288,9 @@ intel_miptree_finish_write(struct brw_context *brw,
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return;
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if (mt->surf.samples > 1) {
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assert(level == 0);
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for (uint32_t a = 0; a < num_layers; a++) {
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intel_miptree_finish_mcs_write(brw, mt, level, start_layer + a,
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intel_miptree_finish_mcs_write(brw, mt, start_layer + a,
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written_with_aux);
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}
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} else {
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