radeonsi: simplify CB_TARGET_MASK logic
we can now rely on CB_COLORn_INFO to disable empty slots. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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@@ -88,27 +88,20 @@ static unsigned si_pack_float_12p4(float x)
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/*
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* Inferred framebuffer and blender state.
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*
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* One of the reasons CB_TARGET_MASK must be derived from the framebuffer state
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* is that:
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* - The blend state mask is 0xf most of the time.
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* - The COLOR1 format isn't INVALID because of possible dual-source blending,
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* so COLOR1 is enabled pretty much all the time.
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* So CB_TARGET_MASK is the only register that can disable COLOR1.
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*
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* Another reason is to avoid a hang with dual source blending.
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* CB_TARGET_MASK is emitted here to avoid a hang with dual source blending
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* if there is not enough PS outputs.
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*/
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static void si_emit_cb_render_state(struct si_context *sctx, struct r600_atom *atom)
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{
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struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
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struct si_state_blend *blend = sctx->queued.named.blend;
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uint32_t cb_target_mask = 0, i;
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for (i = 0; i < sctx->framebuffer.state.nr_cbufs; i++)
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if (sctx->framebuffer.state.cbufs[i])
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cb_target_mask |= 0xf << (4*i);
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uint32_t cb_target_mask, i;
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/* CB_COLORn_INFO.FORMAT=INVALID disables empty colorbuffer slots. */
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if (blend)
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cb_target_mask &= blend->cb_target_mask;
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cb_target_mask = blend->cb_target_mask;
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else
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cb_target_mask = 0xffffffff;
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/* Avoid a hang that happens when dual source blending is enabled
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* but there is not enough color outputs. This is undefined behavior,
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