i965/nir: Move brw_type_for_nir_type() to brw_nir to allow reuse

Upcoming NIR->vec4 pass can benefit from this method, so lets move it up.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

src/mesa/drivers/dri/i965/brw_fs_nir.cpp

@@ -476,24 +476,6 @@ fs_visitor::nir_emit_instr(nir_instr *instr)
    }
 }
 
-static brw_reg_type
-brw_type_for_nir_type(nir_alu_type type)
-{
-   switch (type) {
-   case nir_type_unsigned:
-      return BRW_REGISTER_TYPE_UD;
-   case nir_type_bool:
-   case nir_type_int:
-      return BRW_REGISTER_TYPE_D;
-   case nir_type_float:
-      return BRW_REGISTER_TYPE_F;
-   default:
-      unreachable("unknown type");
-   }
-
-   return BRW_REGISTER_TYPE_F;
-}
-
 bool
 fs_visitor::optimize_frontfacing_ternary(nir_alu_instr *instr,
                                          const fs_reg &result)

src/mesa/drivers/dri/i965/brw_nir.c

@@ -186,3 +186,21 @@ brw_create_nir(struct brw_context *brw,
 
    return nir;
 }
+
+enum brw_reg_type
+brw_type_for_nir_type(nir_alu_type type)
+{
+   switch (type) {
+   case nir_type_unsigned:
+      return BRW_REGISTER_TYPE_UD;
+   case nir_type_bool:
+   case nir_type_int:
+      return BRW_REGISTER_TYPE_D;
+   case nir_type_float:
+      return BRW_REGISTER_TYPE_F;
+   default:
+      unreachable("unknown type");
+   }
+
+   return BRW_REGISTER_TYPE_F;
+}

src/mesa/drivers/dri/i965/brw_nir.h

@@ -24,6 +24,7 @@
 #pragma once
 
 #include "brw_context.h"
+#include "brw_reg.h"
 #include "glsl/nir/nir.h"
 
 #ifdef __cplusplus
@@ -80,6 +81,8 @@ nir_shader *brw_create_nir(struct brw_context *brw,
                            gl_shader_stage stage,
                            bool is_scalar);
 
+enum brw_reg_type brw_type_for_nir_type(nir_alu_type type);
+
 #ifdef __cplusplus
 }
 #endif