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amd/addrlib/gfx10: forbid DCC for swizzle modes which the hardware does not support

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Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Nicolai Hähnle
2018-06-28 21:03:39 +02:00
committed by Marek Olšák
parent 9eb4a79345
commit 97ddcfff7c
1 changed files with 2 additions and 3 deletions
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src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
+2 -3
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@@ -388,10 +388,9 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccInfo(
{
ADDR_E_RETURNCODE ret = ADDR_OK;
if (IsLinear(pIn->swizzleMode) || IsBlock256b(pIn->swizzleMode))
if (pIn->swizzleMode != ADDR_SW_64KB_Z_X && pIn->swizzleMode != ADDR_SW_64KB_R_X)
{
// Hardware support dcc for 256 swizzle mode, but address lib will not support it because we only
// select 256 swizzle mode for small surface, and it's not helpful to enable dcc for small surface.
// Hardware does not support DCC for this swizzle mode.
ret = ADDR_INVALIDPARAMS;
}
else if (m_settings.dccUnsup3DSwDis && IsTex3d(pIn->resourceType) && IsDisplaySwizzle(pIn->swizzleMode))