etnaviv: GC7000: flush TX descriptor and instruction cache
The etnaviv kernel driver will only ever flush write caches. As both the TX descriptor and instruction cache are read caches they must be flushed from the user cmdstream at an appropriate time. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Jonathan Marek <jonathan@marek.ca>
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@@ -413,9 +413,16 @@ static void etna_reset_gpu_state(struct etna_context *ctx)
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* before command stream submission. It does not need flushing if the
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* referenced image data changes.
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*/
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etna_set_state(stream, VIVS_NTE_DESCRIPTOR_FLUSH, 0);
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etna_set_state(stream, VIVS_GL_FLUSH_CACHE,
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VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK12 |
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VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK13);
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/* Icache invalidate (should do this on shader change?) */
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etna_set_state(stream, VIVS_VS_ICACHE_INVALIDATE,
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VIVS_VS_ICACHE_INVALIDATE_UNK0 | VIVS_VS_ICACHE_INVALIDATE_UNK1 |
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VIVS_VS_ICACHE_INVALIDATE_UNK2 | VIVS_VS_ICACHE_INVALIDATE_UNK3 |
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VIVS_VS_ICACHE_INVALIDATE_UNK4);
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}
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ctx->dirty = ~0L;
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