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radeon/r200/r600: allow src and dst BOs to be placed in GTT during blit

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This commit is contained in:
Alex Deucher
2010-03-08 10:13:49 -05:00
parent d7ad1b8b07
commit 9458c2061b
3 changed files with 6 additions and 24 deletions
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src/mesa/drivers/dri/r200/r200_blit.c
+2 -8
View File
@@ -215,18 +215,12 @@ static GLboolean validate_buffers(struct r200_context *r200,
radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs);
ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
if (ret)
return GL_FALSE;
ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
if (ret)
return GL_FALSE;
ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
first_elem(&r200->radeon.dma.reserved)->bo,
RADEON_GEM_DOMAIN_GTT, 0);
dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
if (ret)
return GL_FALSE;
src/mesa/drivers/dri/r600/r600_blit.c
+2 -8
View File
@@ -1536,12 +1536,12 @@ static GLboolean validate_buffers(context_t *rmesa,
radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
if (ret)
return GL_FALSE;
ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
if (ret)
return GL_FALSE;
@@ -1551,12 +1551,6 @@ static GLboolean validate_buffers(context_t *rmesa,
if (ret)
return GL_FALSE;
ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
first_elem(&rmesa->radeon.dma.reserved)->bo,
RADEON_GEM_DOMAIN_GTT, 0);
if (ret)
return GL_FALSE;
return GL_TRUE;
}
src/mesa/drivers/dri/radeon/radeon_blit.c
+2 -8
View File
@@ -208,18 +208,12 @@ static GLboolean validate_buffers(struct r100_context *r100,
radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
if (ret)
return GL_FALSE;
ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
if (ret)
return GL_FALSE;
ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
first_elem(&r100->radeon.dma.reserved)->bo,
RADEON_GEM_DOMAIN_GTT, 0);
dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
if (ret)
return GL_FALSE;