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ilo: switch to ilo states for CC stage

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Define and use

 struct ilo_dsa_state;
 struct ilo_blend_state;
 struct ilo_fb_state;

in ilo_context.
This commit is contained in:
Chia-I Wu
2013-05-29 15:06:48 +08:00
parent 29b938d9f4
commit 94212915ee
9 changed files with 119 additions and 107 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
+24 -29
View File
@@ -611,8 +611,8 @@ gen6_pipeline_clip(struct ilo_3d_pipeline *p,
y1 = fabs(vp->scale[1]) * -1.0f + vp->translate[1];
y2 = fabs(vp->scale[1]) * 1.0f + vp->translate[1];
enable_guardband =
(x1 <= 0.0f && x2 >= (float) ilo->framebuffer.width &&
y1 <= 0.0f && y2 >= (float) ilo->framebuffer.height);
(x1 <= 0.0f && x2 >= (float) ilo->fb.state.width &&
y1 <= 0.0f && y2 >= (float) ilo->fb.state.height);
p->gen6_3DSTATE_CLIP(p->dev,
&ilo->rasterizer->state,
@@ -649,7 +649,7 @@ gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
gen6_wa_pipe_control_post_sync(p, false);
p->gen6_3DSTATE_DRAWING_RECTANGLE(p->dev, 0, 0,
ilo->framebuffer.width, ilo->framebuffer.height, p->cp);
ilo->fb.state.width, ilo->fb.state.height, p->cp);
}
}
@@ -669,11 +669,12 @@ gen6_pipeline_wm(struct ilo_3d_pipeline *p,
const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
const int num_samplers =
ilo->samplers[PIPE_SHADER_FRAGMENT].num_samplers;
const bool dual_blend = (!ilo->blend->logicop_enable &&
ilo->blend->rt[0].blend_enable &&
util_blend_state_is_dual(ilo->blend, 0));
const bool cc_may_kill = (ilo->depth_stencil_alpha->alpha.enabled ||
ilo->blend->alpha_to_coverage);
const bool dual_blend =
(!ilo->blend->state.logicop_enable &&
ilo->blend->state.rt[0].blend_enable &&
util_blend_state_is_dual(&ilo->blend->state, 0));
const bool cc_may_kill = (ilo->dsa->state.alpha.enabled ||
ilo->blend->state.alpha_to_coverage);
if (fs)
assert(!fs->pcb.clip_state_size);
@@ -694,12 +695,8 @@ gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
if (DIRTY(SAMPLE_MASK) || DIRTY(FRAMEBUFFER)) {
const uint32_t *packed_sample_pos;
int num_samples = 1;
if (ilo->framebuffer.nr_cbufs)
num_samples = ilo->framebuffer.cbufs[0]->texture->nr_samples;
packed_sample_pos = (num_samples > 1) ?
packed_sample_pos = (ilo->fb.num_samples > 1) ?
&p->packed_sample_position_4x : &p->packed_sample_position_1x;
if (p->dev->gen == ILO_GEN(6)) {
@@ -707,11 +704,12 @@ gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
gen6_wa_pipe_control_wm_multisample_flush(p);
}
p->gen6_3DSTATE_MULTISAMPLE(p->dev, num_samples, packed_sample_pos,
p->gen6_3DSTATE_MULTISAMPLE(p->dev,
ilo->fb.num_samples, packed_sample_pos,
ilo->rasterizer->state.half_pixel_center, p->cp);
p->gen6_3DSTATE_SAMPLE_MASK(p->dev,
(num_samples > 1) ? ilo->sample_mask : 0x1, p->cp);
(ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1, p->cp);
}
}
@@ -728,7 +726,7 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
}
p->gen6_3DSTATE_DEPTH_BUFFER(p->dev,
ilo->framebuffer.zsbuf, false, p->cp);
ilo->fb.state.zsbuf, false, p->cp);
/* TODO */
p->gen6_3DSTATE_CLEAR_PARAMS(p->dev, 0, p->cp);
@@ -809,18 +807,16 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
/* BLEND_STATE */
if (DIRTY(BLEND) || DIRTY(FRAMEBUFFER) || DIRTY(DEPTH_STENCIL_ALPHA)) {
p->state.BLEND_STATE = p->gen6_BLEND_STATE(p->dev,
ilo->blend, &ilo->framebuffer,
&ilo->depth_stencil_alpha->alpha, p->cp);
&ilo->blend->state, &ilo->fb, &ilo->dsa->state.alpha, p->cp);
session->cc_state_blend_changed = true;
}
/* COLOR_CALC_STATE */
if (DIRTY(DEPTH_STENCIL_ALPHA) || DIRTY(STENCIL_REF) || DIRTY(BLEND_COLOR)) {
p->state.COLOR_CALC_STATE = p->gen6_COLOR_CALC_STATE(p->dev,
&ilo->stencil_ref,
ilo->depth_stencil_alpha->alpha.ref_value,
&ilo->blend_color, p->cp);
p->state.COLOR_CALC_STATE =
p->gen6_COLOR_CALC_STATE(p->dev, &ilo->stencil_ref,
ilo->dsa->state.alpha.ref_value, &ilo->blend_color, p->cp);
session->cc_state_cc_changed = true;
}
@@ -828,8 +824,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
/* DEPTH_STENCIL_STATE */
if (DIRTY(DEPTH_STENCIL_ALPHA)) {
p->state.DEPTH_STENCIL_STATE =
p->gen6_DEPTH_STENCIL_STATE(p->dev,
ilo->depth_stencil_alpha, p->cp);
p->gen6_DEPTH_STENCIL_STATE(p->dev, &ilo->dsa->state, p->cp);
session->cc_state_dsa_changed = true;
}
@@ -861,8 +856,8 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
uint32_t *surface_state = &p->state.wm.SURFACE_STATE[offset];
int i;
for (i = 0; i < ilo->framebuffer.nr_cbufs; i++) {
const struct pipe_surface *surface = ilo->framebuffer.cbufs[i];
for (i = 0; i < ilo->fb.state.nr_cbufs; i++) {
const struct pipe_surface *surface = ilo->fb.state.cbufs[i];
assert(surface);
surface_state[i] =
@@ -877,8 +872,8 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
struct pipe_surface null_surface;
memset(&null_surface, 0, sizeof(null_surface));
null_surface.width = ilo->framebuffer.width;
null_surface.height = ilo->framebuffer.height;
null_surface.width = ilo->fb.state.width;
null_surface.height = ilo->fb.state.height;
surface_state[i] =
p->gen6_surf_SURFACE_STATE(p->dev, &null_surface, p->cp);
@@ -1516,7 +1511,7 @@ gen6_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
* sampler views (vs, fs)
* constant buffers (vs, fs)
*/
count = ilo->framebuffer.nr_cbufs;
count = ilo->fb.state.nr_cbufs;
if (ilo->gs)
count += ilo->gs->info.stream_output.num_outputs;
src/gallium/drivers/ilo/ilo_3d_pipeline_gen7.c
+17 -21
View File
@@ -449,7 +449,7 @@ gen7_pipeline_sf(struct ilo_3d_pipeline *p,
gen7_wa_pipe_control_cs_stall(p, true, true);
p->gen7_3DSTATE_SF(p->dev,
&ilo->rasterizer->state, ilo->framebuffer.zsbuf, p->cp);
&ilo->rasterizer->state, ilo->fb.state.zsbuf, p->cp);
}
}
@@ -462,8 +462,8 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DEPTH_STENCIL_ALPHA) ||
DIRTY(RASTERIZER)) {
const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
const bool cc_may_kill = (ilo->depth_stencil_alpha->alpha.enabled ||
ilo->blend->alpha_to_coverage);
const bool cc_may_kill = (ilo->dsa->state.alpha.enabled ||
ilo->blend->state.alpha_to_coverage);
if (fs)
assert(!fs->pcb.clip_state_size);
@@ -497,9 +497,10 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
const int num_samplers =
ilo->samplers[PIPE_SHADER_FRAGMENT].num_samplers;
const bool dual_blend = (!ilo->blend->logicop_enable &&
ilo->blend->rt[0].blend_enable &&
util_blend_state_is_dual(ilo->blend, 0));
const bool dual_blend =
(!ilo->blend->state.logicop_enable &&
ilo->blend->state.rt[0].blend_enable &&
util_blend_state_is_dual(&ilo->blend->state, 0));
if (fs)
assert(!fs->pcb.clip_state_size);
@@ -547,14 +548,12 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
const bool hiz = false;
p->gen7_3DSTATE_DEPTH_BUFFER(p->dev,
ilo->framebuffer.zsbuf,
ilo->depth_stencil_alpha,
hiz, p->cp);
ilo->fb.state.zsbuf, &ilo->dsa->state, hiz, p->cp);
p->gen6_3DSTATE_HIER_DEPTH_BUFFER(p->dev,
(hiz) ? ilo->framebuffer.zsbuf : NULL, p->cp);
(hiz) ? ilo->fb.state.zsbuf : NULL, p->cp);
p->gen6_3DSTATE_STENCIL_BUFFER(p->dev, ilo->framebuffer.zsbuf, p->cp);
p->gen6_3DSTATE_STENCIL_BUFFER(p->dev, ilo->fb.state.zsbuf, p->cp);
/* TODO */
p->gen6_3DSTATE_CLEAR_PARAMS(p->dev, 0, p->cp);
@@ -569,24 +568,21 @@ gen7_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
if (DIRTY(SAMPLE_MASK) || DIRTY(FRAMEBUFFER)) {
const uint32_t *packed_sample_pos;
int num_samples = 1;
gen7_wa_pipe_control_cs_stall(p, true, true);
if (ilo->framebuffer.nr_cbufs)
num_samples = ilo->framebuffer.cbufs[0]->texture->nr_samples;
packed_sample_pos =
(num_samples > 4) ? p->packed_sample_position_8x :
(num_samples > 1) ? &p->packed_sample_position_4x :
(ilo->fb.num_samples > 4) ? p->packed_sample_position_8x :
(ilo->fb.num_samples > 1) ? &p->packed_sample_position_4x :
&p->packed_sample_position_1x;
p->gen6_3DSTATE_MULTISAMPLE(p->dev, num_samples, packed_sample_pos,
p->gen6_3DSTATE_MULTISAMPLE(p->dev,
ilo->fb.num_samples, packed_sample_pos,
ilo->rasterizer->state.half_pixel_center, p->cp);
p->gen7_3DSTATE_SAMPLE_MASK(p->dev,
(num_samples > 1) ? ilo->sample_mask : 0x1,
num_samples, p->cp);
(ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1,
ilo->fb.num_samples, p->cp);
}
}
@@ -734,7 +730,7 @@ gen7_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
* sampler views (vs, fs)
* constant buffers (vs, fs)
*/
count = ilo->framebuffer.nr_cbufs;
count = ilo->fb.state.nr_cbufs;
for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
count += ilo->sampler_views[shader_type].num_views;
count += ilo->constant_buffers[shader_type].num_buffers;
src/gallium/drivers/ilo/ilo_blit.c
+8 -9
View File
@@ -549,9 +549,8 @@ ilo_blitter_begin(struct ilo_context *ilo, enum ilo_blitter_op op)
util_blitter_save_so_targets(ilo->blitter, ilo->so.count, ilo->so.states);
util_blitter_save_fragment_shader(ilo->blitter, ilo->fs);
util_blitter_save_depth_stencil_alpha(ilo->blitter,
ilo->depth_stencil_alpha);
util_blitter_save_blend(ilo->blitter, ilo->blend);
util_blitter_save_depth_stencil_alpha(ilo->blitter, (void *) ilo->dsa);
util_blitter_save_blend(ilo->blitter, (void *) ilo->blend);
/* undocumented? */
util_blitter_save_viewport(ilo->blitter, &ilo->viewport.states[0]);
@@ -563,11 +562,11 @@ ilo_blitter_begin(struct ilo_context *ilo, enum ilo_blitter_op op)
util_blitter_save_rasterizer(ilo->blitter, (void *) ilo->rasterizer);
break;
case ILO_BLITTER_CLEAR_SURFACE:
util_blitter_save_framebuffer(ilo->blitter, &ilo->framebuffer);
util_blitter_save_framebuffer(ilo->blitter, &ilo->fb.state);
break;
case ILO_BLITTER_BLIT:
util_blitter_save_rasterizer(ilo->blitter, (void *) ilo->rasterizer);
util_blitter_save_framebuffer(ilo->blitter, &ilo->framebuffer);
util_blitter_save_framebuffer(ilo->blitter, &ilo->fb.state);
util_blitter_save_fragment_sampler_states(ilo->blitter,
ilo->samplers[PIPE_SHADER_FRAGMENT].num_samplers,
@@ -602,10 +601,10 @@ ilo_clear(struct pipe_context *pipe,
ilo_blitter_begin(ilo, ILO_BLITTER_CLEAR);
util_blitter_clear(ilo->blitter,
ilo->framebuffer.width, ilo->framebuffer.height,
ilo->framebuffer.nr_cbufs, buffers,
(ilo->framebuffer.nr_cbufs) ? ilo->framebuffer.cbufs[0]->format :
PIPE_FORMAT_NONE,
ilo->fb.state.width, ilo->fb.state.height,
ilo->fb.state.nr_cbufs, buffers,
(ilo->fb.state.nr_cbufs) ? ilo->fb.state.cbufs[0]->format :
PIPE_FORMAT_NONE,
color, depth, stencil);
ilo_blitter_end(ilo);
src/gallium/drivers/ilo/ilo_context.h
+6 -6
View File
@@ -70,16 +70,16 @@ struct ilo_context {
struct pipe_poly_stipple poly_stipple;
unsigned sample_mask;
struct pipe_blend_state *blend;
struct pipe_depth_stencil_alpha_state *depth_stencil_alpha;
const struct ilo_dsa_state *dsa;
struct pipe_stencil_ref stencil_ref;
const struct ilo_blend_state *blend;
struct pipe_blend_color blend_color;
struct ilo_fb_state fb;
struct ilo_shader_state *fs;
struct ilo_shader_state *vs;
struct ilo_shader_state *gs;
struct pipe_blend_color blend_color;
struct pipe_stencil_ref stencil_ref;
struct pipe_framebuffer_state framebuffer;
struct {
struct pipe_sampler_state *samplers[ILO_MAX_SAMPLERS];
unsigned num_samplers;
src/gallium/drivers/ilo/ilo_gpe.h
+14
View File
@@ -88,4 +88,18 @@ struct ilo_rasterizer_state {
struct pipe_rasterizer_state state;
};
struct ilo_dsa_state {
struct pipe_depth_stencil_alpha_state state;
};
struct ilo_blend_state {
struct pipe_blend_state state;
};
struct ilo_fb_state {
struct pipe_framebuffer_state state;
unsigned num_samples;
};
#endif /* ILO_GPE_H */
src/gallium/drivers/ilo/ilo_gpe_gen6.c
+28 -30
View File
@@ -3254,7 +3254,7 @@ gen6_blend_factor_dst_alpha_forced_one(int factor)
static uint32_t
gen6_emit_BLEND_STATE(const struct ilo_dev_info *dev,
const struct pipe_blend_state *blend,
const struct pipe_framebuffer_state *framebuffer,
const struct ilo_fb_state *fb,
const struct pipe_alpha_state *alpha,
struct ilo_cp *cp)
{
@@ -3270,7 +3270,7 @@ gen6_emit_BLEND_STATE(const struct ilo_dev_info *dev,
*
* "The blend state is stored as an array of up to 8 elements..."
*/
num_targets = framebuffer->nr_cbufs;
num_targets = fb->state.nr_cbufs;
assert(num_targets <= 8);
if (!num_targets) {
@@ -3288,11 +3288,10 @@ gen6_emit_BLEND_STATE(const struct ilo_dev_info *dev,
for (i = 0; i < num_targets; i++) {
const int target = (blend->independent_blend_enable) ? i : 0;
const struct pipe_rt_blend_state *rt = &blend->rt[target];
const int num_samples = (target < framebuffer->nr_cbufs) ?
framebuffer->cbufs[target]->texture->nr_samples : 1;
const int num_samples = fb->num_samples;
const struct util_format_description *format_desc =
(target < framebuffer->nr_cbufs) ?
util_format_description(framebuffer->cbufs[target]->format) : NULL;
(target < fb->state.nr_cbufs) ?
util_format_description(fb->state.cbufs[target]->format) : NULL;
bool rt_is_unorm, rt_is_pure_integer, rt_dst_alpha_forced_one;
rt_is_unorm = true;
@@ -3446,6 +3445,9 @@ gen6_emit_DEPTH_STENCIL_STATE(const struct ilo_dev_info *dev,
const struct pipe_depth_stencil_alpha_state *dsa,
struct ilo_cp *cp)
{
const struct pipe_depth_state *depth = &dsa->depth;
const struct pipe_stencil_state *stencil0 = &dsa->stencil[0];
const struct pipe_stencil_state *stencil1 = &dsa->stencil[1];
const int state_align = 64 / 4;
const int state_len = 3;
uint32_t state_offset, *dw;
@@ -3469,33 +3471,29 @@ gen6_emit_DEPTH_STENCIL_STATE(const struct ilo_dev_info *dev,
*
* TODO We do not check these yet.
*/
if (dsa->stencil[0].enabled) {
const struct pipe_stencil_state *stencil = &dsa->stencil[0];
if (stencil0->enabled) {
dw[0] = 1 << 31 |
gen6_translate_dsa_func(stencil->func) << 28 |
gen6_translate_pipe_stencil_op(stencil->fail_op) << 25 |
gen6_translate_pipe_stencil_op(stencil->zfail_op) << 22 |
gen6_translate_pipe_stencil_op(stencil->zpass_op) << 19;
if (stencil->writemask)
gen6_translate_dsa_func(stencil0->func) << 28 |
gen6_translate_pipe_stencil_op(stencil0->fail_op) << 25 |
gen6_translate_pipe_stencil_op(stencil0->zfail_op) << 22 |
gen6_translate_pipe_stencil_op(stencil0->zpass_op) << 19;
if (stencil0->writemask)
dw[0] |= 1 << 18;
dw[1] = stencil->valuemask << 24 |
stencil->writemask << 16;
if (dsa->stencil[1].enabled) {
stencil = &dsa->stencil[1];
dw[1] = stencil0->valuemask << 24 |
stencil0->writemask << 16;
if (stencil1->enabled) {
dw[0] |= 1 << 15 |
gen6_translate_dsa_func(stencil->func) << 12 |
gen6_translate_pipe_stencil_op(stencil->fail_op) << 9 |
gen6_translate_pipe_stencil_op(stencil->zfail_op) << 6 |
gen6_translate_pipe_stencil_op(stencil->zpass_op) << 3;
if (stencil->writemask)
gen6_translate_dsa_func(stencil1->func) << 12 |
gen6_translate_pipe_stencil_op(stencil1->fail_op) << 9 |
gen6_translate_pipe_stencil_op(stencil1->zfail_op) << 6 |
gen6_translate_pipe_stencil_op(stencil1->zpass_op) << 3;
if (stencil1->writemask)
dw[0] |= 1 << 18;
dw[1] |= stencil->valuemask << 8 |
stencil->writemask;
dw[1] |= stencil1->valuemask << 8 |
stencil1->writemask;
}
}
else {
@@ -3516,10 +3514,10 @@ gen6_emit_DEPTH_STENCIL_STATE(const struct ilo_dev_info *dev,
*
* TODO We do not check these yet.
*/
dw[2] = dsa->depth.enabled << 31 |
dsa->depth.writemask << 26;
if (dsa->depth.enabled)
dw[2] |= gen6_translate_dsa_func(dsa->depth.func) << 27;
dw[2] = depth->enabled << 31 |
depth->writemask << 26;
if (depth->enabled)
dw[2] |= gen6_translate_dsa_func(depth->func) << 27;
else
dw[2] |= BRW_COMPAREFUNCTION_ALWAYS << 27;
src/gallium/drivers/ilo/ilo_gpe_gen6.h
+1 -1
View File
@@ -403,7 +403,7 @@ typedef uint32_t
typedef uint32_t
(*ilo_gpe_gen6_BLEND_STATE)(const struct ilo_dev_info *dev,
const struct pipe_blend_state *blend,
const struct pipe_framebuffer_state *framebuffer,
const struct ilo_fb_state *fb,
const struct pipe_alpha_state *alpha,
struct ilo_cp *cp);
src/gallium/drivers/ilo/ilo_shader.c
+3 -3
View File
@@ -64,8 +64,8 @@ ilo_shader_variant_init(struct ilo_shader_variant *variant,
variant->u.fs.flatshade =
(info->has_color_interp && ilo->rasterizer->state.flatshade);
variant->u.fs.fb_height = (info->has_pos) ?
ilo->framebuffer.height : 1;
variant->u.fs.num_cbufs = ilo->framebuffer.nr_cbufs;
ilo->fb.state.height : 1;
variant->u.fs.num_cbufs = ilo->fb.state.nr_cbufs;
break;
default:
assert(!"unknown shader type");
@@ -137,7 +137,7 @@ ilo_shader_variant_guess(struct ilo_shader_variant *variant,
case PIPE_SHADER_FRAGMENT:
variant->u.fs.flatshade = false;
variant->u.fs.fb_height = (info->has_pos) ?
ilo->framebuffer.height : 1;
ilo->fb.state.height : 1;
variant->u.fs.num_cbufs = 1;
break;
default:
src/gallium/drivers/ilo/ilo_state.c
+18 -8
View File
@@ -156,12 +156,12 @@ static void *
ilo_create_blend_state(struct pipe_context *pipe,
const struct pipe_blend_state *state)
{
struct pipe_blend_state *blend;
struct ilo_blend_state *blend;
blend = MALLOC_STRUCT(pipe_blend_state);
blend = MALLOC_STRUCT(ilo_blend_state);
assert(blend);
*blend = *state;
blend->state = *state;
return blend;
}
@@ -330,12 +330,12 @@ static void *
ilo_create_depth_stencil_alpha_state(struct pipe_context *pipe,
const struct pipe_depth_stencil_alpha_state *state)
{
struct pipe_depth_stencil_alpha_state *dsa;
struct ilo_dsa_state *dsa;
dsa = MALLOC_STRUCT(pipe_depth_stencil_alpha_state);
dsa = MALLOC_STRUCT(ilo_dsa_state);
assert(dsa);
*dsa = *state;
dsa->state = *state;
return dsa;
}
@@ -345,7 +345,7 @@ ilo_bind_depth_stencil_alpha_state(struct pipe_context *pipe, void *state)
{
struct ilo_context *ilo = ilo_context(pipe);
ilo->depth_stencil_alpha = state;
ilo->dsa = state;
ilo->dirty |= ILO_DIRTY_DEPTH_STENCIL_ALPHA;
}
@@ -548,7 +548,17 @@ ilo_set_framebuffer_state(struct pipe_context *pipe,
{
struct ilo_context *ilo = ilo_context(pipe);
util_copy_framebuffer_state(&ilo->framebuffer, state);
util_copy_framebuffer_state(&ilo->fb.state, state);
if (state->nr_cbufs)
ilo->fb.num_samples = state->cbufs[0]->texture->nr_samples;
else if (state->zsbuf)
ilo->fb.num_samples = state->zsbuf->texture->nr_samples;
else
ilo->fb.num_samples = 1;
if (!ilo->fb.num_samples)
ilo->fb.num_samples = 1;
ilo->dirty |= ILO_DIRTY_FRAMEBUFFER;
}