iris: proper cache tracking
this is copied from the i965 aux resolve stuff...minus the aux resolves
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@@ -488,6 +488,12 @@ bool iris_blorp_upload_shader(struct blorp_batch *blorp_batch,
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/* iris_resolve.c */
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void iris_predraw_resolve_inputs(struct iris_context *ice,
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struct iris_batch *batch);
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void iris_predraw_resolve_framebuffer(struct iris_context *ice,
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struct iris_batch *batch);
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void iris_postdraw_update_resolve_tracking(struct iris_context *ice,
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struct iris_batch *batch);
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void iris_cache_sets_clear(struct iris_batch *batch);
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void iris_flush_depth_and_render_caches(struct iris_batch *batch);
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void iris_cache_flush_for_read(struct iris_batch *batch, struct iris_bo *bo);
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@@ -51,22 +51,11 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
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iris_batch_maybe_flush(batch, 1500);
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// XXX: actually do brw_cache_flush_for_*
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// XXX: CS stall is really expensive
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iris_emit_pipe_control_flush(batch,
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PIPE_CONTROL_DEPTH_CACHE_FLUSH |
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PIPE_CONTROL_RENDER_TARGET_FLUSH |
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PIPE_CONTROL_CS_STALL);
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iris_emit_pipe_control_flush(batch,
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PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
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PIPE_CONTROL_CONST_CACHE_INVALIDATE);
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iris_cache_sets_clear(batch);
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// XXX: ^^^
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iris_update_compiled_shaders(ice);
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iris_predraw_resolve_inputs(ice, batch);
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iris_predraw_resolve_framebuffer(ice, batch);
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if (iris_binder_is_empty(&batch->binder)) {
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ice->state.dirty |= IRIS_DIRTY_BINDINGS_VS |
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IRIS_DIRTY_BINDINGS_TCS |
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@@ -81,6 +70,5 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
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ice->state.dirty = 0ull;
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// XXX: don't flush always
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//iris_batch_flush(batch);
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iris_postdraw_update_resolve_tracking(ice, batch);
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}
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@@ -31,9 +31,121 @@
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* render-to-texture, format reinterpretation issues, and other situations.
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*/
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#include "iris_context.h"
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#include "util/hash_table.h"
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#include "util/set.h"
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#include "iris_context.h"
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static void
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resolve_sampler_views(struct iris_batch *batch,
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struct iris_shader_state *shs)
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{
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for (int i = 0; i < shs->num_textures; i++) {
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struct iris_sampler_view *isv = shs->textures[i];
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if (!isv)
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continue;
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struct iris_resource *res = (void *) isv->base.texture;
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// XXX: aux tracking
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iris_cache_flush_for_read(batch, res->bo);
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}
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}
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/**
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* \brief Resolve buffers before drawing.
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*
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* Resolve the depth buffer's HiZ buffer, resolve the depth buffer of each
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* enabled depth texture, and flush the render cache for any dirty textures.
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*/
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void
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iris_predraw_resolve_inputs(struct iris_context *ice,
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struct iris_batch *batch)
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{
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for (gl_shader_stage stage = 0; stage < MESA_SHADER_STAGES; stage++) {
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struct iris_shader_state *shs = &ice->state.shaders[stage];
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resolve_sampler_views(batch, shs);
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}
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// XXX: storage images
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}
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void
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iris_predraw_resolve_framebuffer(struct iris_context *ice,
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struct iris_batch *batch)
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{
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struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
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struct pipe_surface *zs_surf = cso_fb->zsbuf;
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if (zs_surf) {
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// XXX: HiZ resolves
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}
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for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
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struct iris_surface *surf = (void *) cso_fb->cbufs[i];
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if (!surf)
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continue;
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struct iris_resource *res = (void *) surf->base.texture;
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// XXX: aux tracking
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iris_cache_flush_for_render(batch, res->bo, surf->view.format,
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ISL_AUX_USAGE_NONE);
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}
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}
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/**
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* \brief Call this after drawing to mark which buffers need resolving
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*
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* If the depth buffer was written to and if it has an accompanying HiZ
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* buffer, then mark that it needs a depth resolve.
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*
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* If the color buffer is a multisample window system buffer, then
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* mark that it needs a downsample.
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*
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* Also mark any render targets which will be textured as needing a render
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* cache flush.
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*/
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void
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iris_postdraw_update_resolve_tracking(struct iris_context *ice,
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struct iris_batch *batch)
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{
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struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
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struct pipe_surface *zs_surf = cso_fb->zsbuf;
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// XXX: front buffer drawing?
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if (zs_surf) {
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struct iris_resource *z_res, *s_res;
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iris_get_depth_stencil_resources(zs_surf->texture, &z_res, &s_res);
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if (z_res) {
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// XXX: aux tracking
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if (ice->state.depth_writes_enabled)
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iris_depth_cache_add_bo(batch, z_res->bo);
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}
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if (s_res) {
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// XXX: aux tracking
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if (ice->state.stencil_writes_enabled)
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iris_depth_cache_add_bo(batch, z_res->bo);
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}
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}
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for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
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struct iris_surface *surf = (void *) cso_fb->cbufs[i];
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if (!surf)
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continue;
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struct iris_resource *res = (void *) surf->base.texture;
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// XXX: aux tracking
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iris_render_cache_add_bo(batch, res->bo, surf->view.format,
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ISL_AUX_USAGE_NONE);
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}
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}
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/**
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* Clear the cache-tracking sets.
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