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nv50/ir: fix ALD/AST where address comes from AL2P

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16784>
This commit is contained in:
Ben Skeggs
2021-11-08 15:33:54 +10:00
committed by Marge Bot
parent 9fd1602fb5
commit 90ff3c350b
3 changed files with 5 additions and 0 deletions
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src/gallium/drivers/nouveau/codegen/nv50_ir.h
+2
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@@ -284,6 +284,8 @@ enum operation
#define NV50_IR_SUBOP_SHF_C (0 << 2)
#define NV50_IR_SUBOP_SHF_W (1 << 2)
#define NV50_IR_SUBOP_VFETCH_PHYS 1
// xmad(src0, src1, 0) << 16 + src2
#define NV50_IR_SUBOP_XMAD_PSL (1 << 0)
// (xmad(src0, src1, src2) & 0xffff) | (src1 << 16)
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
+2
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@@ -843,6 +843,7 @@ CodeEmitterGV100::emitALD()
emitField(74, 2, (insn->getDef(0)->reg.size / 4) - 1);
emitGPR (32, insn->src(0).getIndirect(1));
emitO (79);
emitField(77, 1, insn->subOp); // .PHYS
emitP (76);
emitADDR (24, 40, 10, 0, insn->src(0));
emitGPR (16, insn->def(0));
@@ -854,6 +855,7 @@ CodeEmitterGV100::emitAST()
emitInsn (0x322);
emitField(74, 2, (typeSizeof(insn->dType) / 4) - 1);
emitGPR (64, insn->src(0).getIndirect(1));
emitField(77, 1, insn->subOp); // .PHYS
emitP (76);
emitADDR (24, 40, 10, 0, insn->src(0));
emitGPR (32, insn->src(1));
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+1
View File
@@ -3416,6 +3416,7 @@ NVC0LoweringPass::visit(Instruction *i)
addr->reg.data.offset = 0;
i->setSrc(0, addr);
i->setIndirect(0, 0, afetch->getDef(0));
i->subOp = NV50_IR_SUBOP_VFETCH_PHYS;
}
return ret;