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gallivm/nir: add some f16 support

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GLSL lowers packhalf2x16 itself, but for SPIRV we don't have that
option.

For packing when NIR lowers it uses f2f16
and for unpack it needs the casting and f2f32

Fixes:
dEQP-VK.glsl.builtin.function.pack_unpack.packhalf2x16*
dEQP-VK.glsl.builtin.function.pack_unpack.unpackhalf2x16*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>
This commit is contained in:
Dave Airlie
2020-08-24 13:52:46 +10:00
parent b31e8460a6
commit 8f6eb35e09
1 changed files with 12 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/auxiliary/gallivm/lp_bld_nir.c
+12 -2
View File
@@ -46,6 +46,8 @@ static LLVMValueRef cast_type(struct lp_build_nir_context *bld_base, LLVMValueRe
switch (alu_type) {
case nir_type_float:
switch (bit_size) {
case 16:
return LLVMBuildBitCast(builder, val, LLVMVectorType(LLVMHalfTypeInContext(bld_base->base.gallivm->context), bld_base->base.type.length), "");
case 32:
return LLVMBuildBitCast(builder, val, bld_base->base.vec_type, "");
case 64:
@@ -489,9 +491,17 @@ static LLVMValueRef do_alu_action(struct lp_build_nir_context *bld_base,
case nir_op_f2b32:
result = flt_to_bool32(bld_base, src_bit_size[0], src[0]);
break;
case nir_op_f2f32:
case nir_op_f2f16:
result = LLVMBuildFPTrunc(builder, src[0],
bld_base->base.vec_type, "");
LLVMVectorType(LLVMHalfTypeInContext(gallivm->context), bld_base->base.type.length), "");
break;
case nir_op_f2f32:
if (src_bit_size[0] < 32)
result = LLVMBuildFPExt(builder, src[0],
bld_base->base.vec_type, "");
else
result = LLVMBuildFPTrunc(builder, src[0],
bld_base->base.vec_type, "");
break;
case nir_op_f2f64:
result = LLVMBuildFPExt(builder, src[0],