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r600g: cleanup deprecated register tables

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These registers are either already emitted elsewhere or moved to start_cs.

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>
This commit is contained in:
Marek Olšák
2013-02-27 12:43:19 +01:00
parent f0636bc982
commit 8f192a3c9e
3 changed files with 14 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/r600/evergreen_hw_context.c
-42
View File
@@ -28,18 +28,7 @@
#include "util/u_memory.h"
#include "util/u_math.h"
static const struct r600_reg cayman_config_reg_list[] = {
{R_009100_SPI_CONFIG_CNTL, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0},
{R_00913C_SPI_CONFIG_CNTL_1, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0},
};
static const struct r600_reg evergreen_context_reg_list[] = {
{R_028010_DB_RENDER_OVERRIDE2, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_028014_DB_HTILE_DATA_BASE, REG_FLAG_NEED_BO, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_02861C_SPI_VS_OUT_ID_0, 0, 0},
{R_028620_SPI_VS_OUT_ID_1, 0, 0},
{R_028624_SPI_VS_OUT_ID_2, 0, 0},
@@ -85,30 +74,19 @@ static const struct r600_reg evergreen_context_reg_list[] = {
{R_0286C0_SPI_PS_INPUT_CNTL_31, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_0286C4_SPI_VS_OUT_CONFIG, 0, 0},
{R_0286C8_SPI_THREAD_GROUPING, 0, 0},
{R_0286CC_SPI_PS_IN_CONTROL_0, 0, 0},
{R_0286D0_SPI_PS_IN_CONTROL_1, 0, 0},
{R_0286D8_SPI_INPUT_Z, 0, 0},
{R_0286E0_SPI_BARYC_CNTL, 0, 0},
{R_0286E4_SPI_PS_IN_CONTROL_2, 0, 0},
{R_0286E8_SPI_COMPUTE_INPUT_CNTL, 0, 0},
{R_028840_SQ_PGM_START_PS, REG_FLAG_NEED_BO, 0},
{R_028844_SQ_PGM_RESOURCES_PS, 0, 0},
{R_02884C_SQ_PGM_EXPORTS_PS, 0, 0},
{R_02885C_SQ_PGM_START_VS, REG_FLAG_NEED_BO, 0},
{R_028860_SQ_PGM_RESOURCES_VS, 0, 0},
{R_0288EC_SQ_LDS_ALLOC_PS, 0, 0},
{R_028ABC_DB_HTILE_SURFACE, 0, 0},
{R_028B54_VGT_SHADER_STAGES_EN, 0, 0},
};
static const struct r600_reg cayman_context_reg_list[] = {
{R_028010_DB_RENDER_OVERRIDE2, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_028014_DB_HTILE_DATA_BASE, REG_FLAG_NEED_BO, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_02861C_SPI_VS_OUT_ID_0, 0, 0},
{R_028620_SPI_VS_OUT_ID_1, 0, 0},
{R_028624_SPI_VS_OUT_ID_2, 0, 0},
@@ -152,31 +130,16 @@ static const struct r600_reg cayman_context_reg_list[] = {
{R_0286BC_SPI_PS_INPUT_CNTL_30, 0, 0},
{R_0286C0_SPI_PS_INPUT_CNTL_31, 0, 0},
{R_0286C4_SPI_VS_OUT_CONFIG, 0, 0},
{R_0286C8_SPI_THREAD_GROUPING, 0, 0},
{R_0286CC_SPI_PS_IN_CONTROL_0, 0, 0},
{R_0286D0_SPI_PS_IN_CONTROL_1, 0, 0},
{R_0286D8_SPI_INPUT_Z, 0, 0},
{R_0286E0_SPI_BARYC_CNTL, 0, 0},
{R_0286E4_SPI_PS_IN_CONTROL_2, 0, 0},
{R_0286E8_SPI_COMPUTE_INPUT_CNTL, 0, 0},
{R_028838_SQ_DYN_GPR_RESOURCE_LIMIT_1, 0, 0},
{R_028840_SQ_PGM_START_PS, REG_FLAG_NEED_BO, 0},
{R_028844_SQ_PGM_RESOURCES_PS, 0, 0},
{R_02884C_SQ_PGM_EXPORTS_PS, 0, 0},
{R_02885C_SQ_PGM_START_VS, REG_FLAG_NEED_BO, 0},
{R_028860_SQ_PGM_RESOURCES_VS, 0, 0},
{R_028900_SQ_ESGS_RING_ITEMSIZE, 0, 0},
{R_028904_SQ_GSVS_RING_ITEMSIZE, 0, 0},
{R_028908_SQ_ESTMP_RING_ITEMSIZE, 0, 0},
{R_02890C_SQ_GSTMP_RING_ITEMSIZE, 0, 0},
{R_028910_SQ_VSTMP_RING_ITEMSIZE, 0, 0},
{R_028914_SQ_PSTMP_RING_ITEMSIZE, 0, 0},
{R_02891C_SQ_GS_VERT_ITEMSIZE, 0, 0},
{R_028920_SQ_GS_VERT_ITEMSIZE_1, 0, 0},
{R_028924_SQ_GS_VERT_ITEMSIZE_2, 0, 0},
{R_028928_SQ_GS_VERT_ITEMSIZE_3, 0, 0},
{R_028ABC_DB_HTILE_SURFACE, 0, 0},
{R_028B54_VGT_SHADER_STAGES_EN, 0, 0},
};
int evergreen_context_init(struct r600_context *ctx)
@@ -184,11 +147,6 @@ int evergreen_context_init(struct r600_context *ctx)
int r = 0;
/* add blocks */
if (ctx->family >= CHIP_CAYMAN)
r = r600_context_add_block(ctx, cayman_config_reg_list,
Elements(cayman_config_reg_list), PKT3_SET_CONFIG_REG, EVERGREEN_CONFIG_REG_OFFSET);
if (r)
goto out_err;
if (ctx->family >= CHIP_CAYMAN)
r = r600_context_add_block(ctx, cayman_context_reg_list,
Elements(cayman_context_reg_list), PKT3_SET_CONTEXT_REG, EVERGREEN_CONTEXT_REG_OFFSET);
src/gallium/drivers/r600/evergreen_state.c
+14
View File
@@ -2840,6 +2840,13 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
}
r600_store_context_reg(cb, R_028010_DB_RENDER_OVERRIDE2, 0);
r600_store_context_reg(cb, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0);
r600_store_context_reg(cb, R_0286C8_SPI_THREAD_GROUPING, 0);
r600_store_context_reg(cb, R_0286E8_SPI_COMPUTE_INPUT_CNTL, 0);
r600_store_context_reg(cb, R_028B54_VGT_SHADER_STAGES_EN, 0);
r600_store_context_reg(cb, R_028838_SQ_DYN_GPR_RESOURCE_LIMIT_1, 0);
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF);
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF);
}
@@ -3289,6 +3296,13 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
}
r600_store_context_reg(cb, R_028010_DB_RENDER_OVERRIDE2, 0);
r600_store_context_reg(cb, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0);
r600_store_context_reg(cb, R_0286C8_SPI_THREAD_GROUPING, 0);
r600_store_context_reg(cb, R_0286E8_SPI_COMPUTE_INPUT_CNTL, 0);
r600_store_context_reg(cb, R_0288EC_SQ_LDS_ALLOC_PS, 0);
r600_store_context_reg(cb, R_028B54_VGT_SHADER_STAGES_EN, 0);
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF);
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF);
}
src/gallium/drivers/r600/r600_hw_context.c
-3
View File
@@ -216,7 +216,6 @@ int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg,
}
static const struct r600_reg r600_context_reg_list[] = {
{R_028D24_DB_HTILE_SURFACE, 0, 0},
{R_028614_SPI_VS_OUT_ID_0, 0, 0},
{R_028618_SPI_VS_OUT_ID_1, 0, 0},
{R_02861C_SPI_VS_OUT_ID_2, 0, 0},
@@ -233,8 +232,6 @@ static const struct r600_reg r600_context_reg_list[] = {
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_028868_SQ_PGM_RESOURCES_VS, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_0288A4_SQ_PGM_RESOURCES_FS, 0, 0},
{R_0288DC_SQ_PGM_CF_OFFSET_FS, 0, 0},
{R_028644_SPI_PS_INPUT_CNTL_0, 0, 0},
{R_028648_SPI_PS_INPUT_CNTL_1, 0, 0},
{R_02864C_SPI_PS_INPUT_CNTL_2, 0, 0},