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radeonsi: fix PS prolog not counting used fragcoord VGPRs correctly

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Using the used component count is not enough. We need to consider
the component mask because any component can be disabled. This might
fix tests.

This removes the component counting from ac_get_fs_input_vgpr_cnt
and determines the component mask where it's needed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
This commit is contained in:
Marek Olšák
2025-01-06 00:37:57 -05:00
committed by Marge Bot
parent 67c772c293
commit 8e8eda4089
5 changed files with 17 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/common/ac_shader_util.c
+5 -18
View File
@@ -605,11 +605,9 @@ enum ac_image_dim ac_get_image_dim(enum amd_gfx_level gfx_level, enum glsl_sampl
return dim;
}
unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
uint8_t *num_fragcoord_components)
unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config)
{
unsigned num_input_vgprs = 0;
unsigned fragcoord_components = 0;
if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
num_input_vgprs += 2;
@@ -627,22 +625,14 @@ unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
num_input_vgprs += 2;
if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr))
num_input_vgprs += 1;
if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr)) {
if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr))
num_input_vgprs += 1;
fragcoord_components++;
}
if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr)) {
if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr))
num_input_vgprs += 1;
fragcoord_components++;
}
if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr)) {
if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr))
num_input_vgprs += 1;
fragcoord_components++;
}
if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr)) {
if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr))
num_input_vgprs += 1;
fragcoord_components++;
}
if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr))
num_input_vgprs += 1;
if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr))
@@ -652,9 +642,6 @@ unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
num_input_vgprs += 1;
if (num_fragcoord_components)
*num_fragcoord_components = fragcoord_components;
return num_input_vgprs;
}
src/amd/common/ac_shader_util.h
+1 -2
View File
@@ -269,8 +269,7 @@ enum ac_image_dim ac_get_sampler_dim(enum amd_gfx_level gfx_level, enum glsl_sam
enum ac_image_dim ac_get_image_dim(enum amd_gfx_level gfx_level, enum glsl_sampler_dim sdim,
bool is_array);
unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
uint8_t *num_fragcoord_components);
unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config);
uint16_t ac_get_ps_iter_mask(unsigned ps_iter_samples);
src/amd/vulkan/radv_shader.c
+1 -1
View File
@@ -1933,7 +1933,7 @@ radv_postprocess_binary_config(struct radv_device *device, struct radv_shader_bi
unsigned num_input_vgprs = args->ac.num_vgprs_used;
if (stage == MESA_SHADER_FRAGMENT) {
num_input_vgprs = ac_get_fs_input_vgpr_cnt(config, NULL);
num_input_vgprs = ac_get_fs_input_vgpr_cnt(config);
}
unsigned num_vgprs = MAX2(config->num_vgprs, num_input_vgprs);
src/gallium/drivers/radeonsi/si_shader.c
+9 -7
View File
@@ -3182,10 +3182,8 @@ bool si_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compi
}
/* Calculate the number of fragment input VGPRs. */
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
shader->info.num_input_vgprs = ac_get_fs_input_vgpr_cnt(
&shader->config, &shader->info.num_fragcoord_components);
}
if (nir->info.stage == MESA_SHADER_FRAGMENT)
shader->info.num_input_vgprs = ac_get_fs_input_vgpr_cnt(&shader->config);
si_calculate_max_simd_waves(shader);
@@ -3319,7 +3317,11 @@ static void si_get_ps_prolog_key(struct si_shader *shader, union si_shader_part_
key->ps_prolog.states.force_linear_center_interp ||
key->ps_prolog.states.bc_optimize_for_persp || key->ps_prolog.states.bc_optimize_for_linear ||
key->ps_prolog.states.samplemask_log_ps_iter);
key->ps_prolog.num_fragcoord_components = shader->info.num_fragcoord_components;
key->ps_prolog.fragcoord_usage_mask =
G_0286CC_POS_X_FLOAT_ENA(shader->config.spi_ps_input_ena) |
(G_0286CC_POS_Y_FLOAT_ENA(shader->config.spi_ps_input_ena) << 1) |
(G_0286CC_POS_Z_FLOAT_ENA(shader->config.spi_ps_input_ena) << 2) |
(G_0286CC_POS_W_FLOAT_ENA(shader->config.spi_ps_input_ena) << 3);
if (shader->key.ps.part.prolog.poly_stipple)
shader->info.uses_vmem_load_other = true;
@@ -3786,8 +3788,8 @@ void si_get_ps_prolog_args(struct si_shader_args *args,
/* skip LINE_STIPPLE_TEX */
/* POS_X|Y|Z|W_FLOAT */
for (unsigned i = 0; i < key->ps_prolog.num_fragcoord_components; i++)
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, NULL);
u_foreach_bit(i, key->ps_prolog.fragcoord_usage_mask)
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[i]);
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.front_face);
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.ancillary);
src/gallium/drivers/radeonsi/si_shader.h
+1 -2
View File
@@ -704,7 +704,7 @@ union si_shader_part_key {
/* Color interpolation and two-side color selection. */
unsigned colors_read : 8; /* color input components read */
unsigned num_interp_inputs : 5; /* BCOLOR is at this location */
unsigned num_fragcoord_components : 3;
unsigned fragcoord_usage_mask : 4;
unsigned wqm : 1;
char color_attr_index[2];
signed char color_interp_vgpr_index[2]; /* -1 == constant */
@@ -869,7 +869,6 @@ struct si_shader_binary_info {
uint8_t num_input_vgprs;
bool uses_vmem_load_other; /* all other VMEM loads and atomics with return */
bool uses_vmem_sampler_or_bvh;
uint8_t num_fragcoord_components;
bool uses_instanceid;
uint8_t nr_pos_exports;
uint8_t nr_param_exports;