radeonsi: add vs prolog args needed by aco ls vgpr fix

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
This commit is contained in:
Qiang Yu
2023-08-29 15:41:38 +08:00
parent 23cb6768cb
commit 8cbd52f001
+9 -2
View File
@@ -3647,8 +3647,15 @@ void si_get_vs_prolog_args(enum amd_gfx_level gfx_level,
args->ac.vertex_id = input_vgprs[vertex_id_vgpr];
args->ac.instance_id = input_vgprs[instance_id_vgpr];
if (key->vs_prolog.as_ls && gfx_level < GFX11)
args->ac.vs_rel_patch_id = input_vgprs[first_vs_vgpr + 1];
if (key->vs_prolog.as_ls) {
if (gfx_level < GFX11)
args->ac.vs_rel_patch_id = input_vgprs[first_vs_vgpr + 1];
if (gfx_level >= GFX9) {
args->ac.tcs_patch_id = input_vgprs[0];
args->ac.tcs_rel_ids = input_vgprs[1];
}
}
unsigned user_sgpr_base = key->vs_prolog.num_merged_next_stage_vgprs ? 8 : 0;
args->internal_bindings = input_sgprs[user_sgpr_base + SI_SGPR_INTERNAL_BINDINGS];