r600/sfn: cleanup GS shader emission

Now that we lower all load_per_vertex_input to
r600_load_per_vertex_input we can remove some dead code
and also change the intrinsic to use only one source value.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36488>

src/compiler/nir/nir_intrinsics.py

@@ -1670,7 +1670,7 @@ store("tf_r600", [])
 
 # these two definitions are aimed at r600 indirect per_vertex_input accesses
 intrinsic("r600_indirect_vertex_at_index", dest_comp=1, src_comp=[1], flags=[CAN_ELIMINATE, CAN_REORDER])
-load("r600_indirect_per_vertex_input", [1, 1], [BASE, RANGE, COMPONENT, DEST_TYPE, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER])
+load("r600_per_vertex_input", [1], [BASE, RANGE, COMPONENT, DEST_TYPE, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER])
 
 # AMD GCN/RDNA specific intrinsics
 

src/gallium/drivers/r600/sfn/sfn_nir.cpp

@@ -312,14 +312,13 @@ class LowerGSArrayInput : public NirLowerInstruction {
       auto new_addr =
          nir_iadd(b, vbase, nir_ishl(b, intr->src[1].ssa, nir_imm_int(b, 2)));
       auto io_semantics = nir_intrinsic_io_semantics(intr);
-      return nir_load_r600_indirect_per_vertex_input(b,
-                                                     intr->num_components,
-                                                     intr->def.bit_size,
-                                                     new_addr,
-                                                     nir_imm_zero(b, 1, 32),
-                                                     .base = nir_intrinsic_base(intr),
-                                                     .range = nir_intrinsic_range(intr),
-                                                     .io_semantics = io_semantics);
+      return nir_load_r600_per_vertex_input(b,
+                                            intr->num_components,
+                                            intr->def.bit_size,
+                                            new_addr,
+                                            .base = nir_intrinsic_base(intr),
+                                            .range = nir_intrinsic_range(intr),
+                                            .io_semantics = io_semantics);
    }
    nir_def *m_base_array{nullptr};
 };

src/gallium/drivers/r600/sfn/sfn_shader_gs.cpp

@@ -28,8 +28,7 @@ GeometryShader::do_scan_instruction(nir_instr *instr)
    switch (ii->intrinsic) {
    case nir_intrinsic_store_output:
       return process_store_output(ii);
-   case nir_intrinsic_load_per_vertex_input:
-   case nir_intrinsic_load_r600_indirect_per_vertex_input:
+   case nir_intrinsic_load_r600_per_vertex_input:
       return process_load_input(ii);
    case nir_intrinsic_r600_indirect_vertex_at_index:
       return true;
@@ -101,9 +100,7 @@ GeometryShader::process_load_input(nir_intrinsic_instr *instr)
        (location >= VARYING_SLOT_TEX0 && location <= VARYING_SLOT_TEX7)) {
 
       if (nir_intrinsic_io_semantics(instr).num_slots == 1) {
-         auto index = nir_src_as_const_value(instr->src[1]);
-         auto driver_location = nir_intrinsic_base(instr) + index->u32;
-         add_input_at(location, driver_location);
+         add_input_at(location, nir_intrinsic_base(instr));
       } else {
          auto base = nir_intrinsic_base(instr);
          unsigned range = nir_intrinsic_range(instr);
@@ -182,10 +179,8 @@ GeometryShader::process_stage_intrinsic(nir_intrinsic_instr *intr)
       return emit_simple_mov(intr->def, 0, m_primitive_id);
    case nir_intrinsic_load_invocation_id:
       return emit_simple_mov(intr->def, 0, m_invocation_id);
-   case nir_intrinsic_load_per_vertex_input:
-      return emit_load_per_vertex_input_direct(intr);
-   case nir_intrinsic_load_r600_indirect_per_vertex_input:
-      return emit_load_per_vertex_input_indirect(intr);
+   case nir_intrinsic_load_r600_per_vertex_input:
+      return emit_load_per_vertex_input(intr);
    case nir_intrinsic_r600_indirect_vertex_at_index:
       return emit_indirect_vertex_at_index(intr);
    default:;
@@ -333,28 +328,11 @@ GeometryShader::emit_indirect_vertex_at_index(nir_intrinsic_instr *instr)
 }
 
 bool
-GeometryShader::emit_load_per_vertex_input_direct(nir_intrinsic_instr *instr)
-{
-   auto literal_index = nir_src_as_const_value(instr->src[0]);
-   assert(literal_index);
-   assert(literal_index->u32 < R600_GS_VERTEX_INDIRECT_TOTAL);
-   assert(nir_intrinsic_io_semantics(instr).num_slots == 1);
-
-   return load_per_vertex_input_at_addr(instr, m_per_vertex_offsets[literal_index->u32]);
-}
-
-bool
-GeometryShader::emit_load_per_vertex_input_indirect(nir_intrinsic_instr *instr)
-{
-   return load_per_vertex_input_at_addr(
-      instr,
-      value_factory().src(instr->src[0], 0)->as_register());
-}
-
-bool
-GeometryShader::load_per_vertex_input_at_addr(nir_intrinsic_instr *instr, PRegister addr)
+GeometryShader::emit_load_per_vertex_input(nir_intrinsic_instr *instr)
 {
    auto dest = value_factory().dest_vec4(instr->def, pin_group);
+   auto addr = value_factory().src(instr->src[0], 0)->as_register();
+   assert(addr);
 
    RegisterVec4::Swizzle dest_swz{7, 7, 7, 7};
    for (unsigned i = 0; i < instr->def.num_components; ++i) {

src/gallium/drivers/r600/sfn/sfn_shader_gs.h

@@ -37,11 +37,7 @@ private:
 
    bool emit_indirect_vertex_at_index(nir_intrinsic_instr *instr);
 
-   bool emit_load_per_vertex_input_direct(nir_intrinsic_instr *instr);
-
-   bool emit_load_per_vertex_input_indirect(nir_intrinsic_instr *instr);
-
-   bool load_per_vertex_input_at_addr(nir_intrinsic_instr *instr, PRegister addr);
+   bool emit_load_per_vertex_input(nir_intrinsic_instr *instr);
 
    bool load_input(UNUSED nir_intrinsic_instr *intr) override
    {