brw: Set relevant immediate bits for Gfx9-11 in JIP and UIP helpers

This is better than using the generic helper since will not set unwanted
bits (e.g. hstride) and it is already handling their case for Gfx12+
anyway.

There's an extra helper now for the case where src1 is not used.  In
Gfx9-11 it needs to be set to ARF but with a matching type of src0.

Assembler was updated to follow the same approach.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36454>

src/intel/compiler/brw/brw_asm.c

@@ -63,6 +63,8 @@ brw_asm_label_use_jip(const char *name)
    brw_asm_label *label = brw_asm_label_lookup(name);
    int offset = p->next_insn_offset - sizeof(brw_eu_inst);
    util_dynarray_append(&label->jip_uses, offset);
+   /* Will be patched later. */
+   brw_eu_inst_set_jip(p->devinfo, brw_last_inst, 0);
 }
 
 void
@@ -71,6 +73,8 @@ brw_asm_label_use_uip(const char *name)
    brw_asm_label *label = brw_asm_label_lookup(name);
    int offset = p->next_insn_offset - sizeof(brw_eu_inst);
    util_dynarray_append(&label->uip_uses, offset);
+   /* Will be patched later. */
+   brw_eu_inst_set_uip(p->devinfo, brw_last_inst, 0);
 }
 
 static bool

src/intel/compiler/brw/brw_eu_emit.c

@@ -1141,10 +1141,8 @@ brw_IF(struct brw_codegen *p, unsigned execute_size)
    /* Override the defaults for this instruction:
     */
    brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_TYPE_D)));
-   if (devinfo->ver < 12)
-      brw_set_src0(p, insn, brw_imm_d(0));
-   brw_eu_inst_set_jip(devinfo, insn, 0);
-   brw_eu_inst_set_uip(devinfo, insn, 0);
+
+   /* UIP and JIP set by patch_IF_ELSE(). */
 
    brw_eu_inst_set_exec_size(devinfo, insn, execute_size);
    brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
@@ -1219,10 +1217,8 @@ brw_ELSE(struct brw_codegen *p)
    insn = next_insn(p, BRW_OPCODE_ELSE);
 
    brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D));
-   if (devinfo->ver < 12)
-      brw_set_src0(p, insn, brw_imm_d(0));
-   brw_eu_inst_set_jip(devinfo, insn, 0);
-   brw_eu_inst_set_uip(devinfo, insn, 0);
+
+   /* UIP and JIP set by patch_IF_ELSE(). */
 
    brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
    brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE);
@@ -1270,12 +1266,12 @@ brw_ENDIF(struct brw_codegen *p)
    }
    if_inst = tmp;
 
-   brw_set_src0(p, insn, brw_imm_d(0));
-
    brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
    brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE);
 
    brw_eu_inst_set_jip(devinfo, insn, 2);
+   brw_eu_inst_set_unused_uip(devinfo, insn);
+
    patch_IF_ELSE(p, if_inst, else_inst, insn);
 }
 
@@ -1287,7 +1283,9 @@ brw_BREAK(struct brw_codegen *p)
 
    insn = next_insn(p, BRW_OPCODE_BREAK);
    brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D));
-   brw_set_src0(p, insn, brw_imm_d(0x0));
+
+   /* UIP and JIP set by brw_set_uip_jip(). */
+
    brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
    brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p));
 
@@ -1302,7 +1300,8 @@ brw_CONT(struct brw_codegen *p)
 
    insn = next_insn(p, BRW_OPCODE_CONTINUE);
    brw_set_dest(p, insn, brw_ip_reg());
-   brw_set_src0(p, insn, brw_imm_d(0x0));
+
+   /* UIP and JIP set by brw_set_uip_jip(). */
 
    brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
    brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p));
@@ -1317,9 +1316,8 @@ brw_HALT(struct brw_codegen *p)
 
    insn = next_insn(p, BRW_OPCODE_HALT);
    brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D));
-   if (devinfo->ver < 12) {
-      brw_set_src0(p, insn, brw_imm_d(0x0));
-   }
+
+   /* UIP and JIP set by brw_set_uip_jip(). */
 
    brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
    brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p));
@@ -1356,9 +1354,8 @@ brw_WHILE(struct brw_codegen *p)
    do_insn = get_inner_do_insn(p);
 
    brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D));
-   if (devinfo->ver < 12)
-      brw_set_src0(p, insn, brw_imm_d(0));
    brw_eu_inst_set_jip(devinfo, insn, br * (do_insn - insn));
+   brw_eu_inst_set_unused_uip(devinfo, insn);
 
    brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p));
 

src/intel/compiler/brw/brw_eu_inst.h

@@ -675,43 +675,6 @@ REG_TYPE(src1)
 REG_TYPE(src2)
 #undef REG_TYPE
 
-/**
- * Flow control instruction bits:
- *  @{
- */
-static inline void
-brw_eu_inst_set_uip(const struct intel_device_info *devinfo,
-                 brw_eu_inst *inst, int32_t value)
-{
-   if (devinfo->ver >= 12)
-      brw_eu_inst_set_src1_is_imm(devinfo, inst, 1);
-
-   brw_eu_inst_set_bits(inst, 95, 64, (uint32_t)value);
-}
-
-static inline int32_t
-brw_eu_inst_uip(const struct intel_device_info *devinfo, const brw_eu_inst *inst)
-{
-   return brw_eu_inst_bits(inst, 95, 64);
-}
-
-static inline void
-brw_eu_inst_set_jip(const struct intel_device_info *devinfo,
-                 brw_eu_inst *inst, int32_t value)
-{
-   if (devinfo->ver >= 12)
-      brw_eu_inst_set_src0_is_imm(devinfo, inst, 1);
-
-   brw_eu_inst_set_bits(inst, 127, 96, (uint32_t)value);
-}
-
-static inline int32_t
-brw_eu_inst_jip(const struct intel_device_info *devinfo, const brw_eu_inst *inst)
-{
-   return brw_eu_inst_bits(inst, 127, 96);
-}
-/** @} */
-
 /**
  * SEND instructions:
  *  @{
@@ -1126,6 +1089,66 @@ REG_TYPE(src1)
 #undef REG_TYPE
 
 
+/**
+ * Flow control instruction bits:
+ *  @{
+ */
+static inline void
+brw_eu_inst_set_uip(const struct intel_device_info *devinfo,
+                    brw_eu_inst *inst, int32_t value)
+{
+   if (devinfo->ver >= 12)
+      brw_eu_inst_set_src1_is_imm(devinfo, inst, 1);
+   else
+      brw_eu_inst_set_src1_file_type(devinfo, inst, IMM, BRW_TYPE_D);
+
+   brw_eu_inst_set_bits(inst, 95, 64, (uint32_t)value);
+}
+
+static inline int32_t
+brw_eu_inst_uip(const struct intel_device_info *devinfo, const brw_eu_inst *inst)
+{
+   return brw_eu_inst_bits(inst, 95, 64);
+}
+
+static inline void
+brw_eu_inst_set_unused_uip(const struct intel_device_info *devinfo,
+                           brw_eu_inst *inst)
+{
+   if (devinfo->ver < 12) {
+      /* When Src1 is not used, old versions required its file to be ARF and
+       * its type to match Src0 type.  See "Non-present Operands" in PRM for
+       * SKL, vol 7 "3D-Media-GPGPU".
+       *
+       * Note: in BRW we only use immediate sources for the branching
+       * instructions.
+       */
+      brw_eu_inst_set_src1_file_type(devinfo, inst, ARF, BRW_TYPE_D);
+      assert(brw_eu_inst_src0_reg_hw_type(devinfo, inst) ==
+             brw_eu_inst_src1_reg_hw_type(devinfo, inst));
+   }
+}
+
+static inline void
+brw_eu_inst_set_jip(const struct intel_device_info *devinfo,
+                    brw_eu_inst *inst, int32_t value)
+{
+   if (devinfo->ver >= 12)
+      brw_eu_inst_set_src0_is_imm(devinfo, inst, 1);
+   else
+      brw_eu_inst_set_src0_file_type(devinfo, inst, IMM, BRW_TYPE_D);
+
+   brw_eu_inst_set_bits(inst, 127, 96, (uint32_t)value);
+}
+
+static inline int32_t
+brw_eu_inst_jip(const struct intel_device_info *devinfo, const brw_eu_inst *inst)
+{
+   return brw_eu_inst_bits(inst, 127, 96);
+}
+/** @} */
+
+
 /* The AddrImm fields are split into two discontiguous sections on Gfx9+ */
 #define BRW_IA1_ADDR_IMM(reg, g9_nine, g9_high, g9_low,                  \
                          g12_high, g12_low, g20_high, g20_low, g20_zero) \

src/intel/compiler/brw/brw_gram.y

@@ -1116,11 +1116,10 @@ branchinstruction:
    {
       brw_next_insn(p, $2);
       brw_asm_label_use_jip($5);
+      brw_eu_inst_set_unused_uip(p->devinfo, brw_last_inst);
       i965_asm_set_instruction_options(p, $6);
       brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
-      brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-
       brw_pop_insn_state(p);
    }
    | ELSE execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
@@ -1132,8 +1131,6 @@ branchinstruction:
       brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $2);
 
       brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
-      if (p->devinfo->ver < 12)
-         brw_set_src0(p, brw_last_inst, brw_imm_d(0));
    }
    | predicate IF execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
    {
@@ -1144,8 +1141,6 @@ branchinstruction:
       brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
       brw_set_dest(p, brw_last_inst, vec1(retype(brw_null_reg(), BRW_TYPE_D)));
-      if (p->devinfo->ver < 12)
-         brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
       brw_pop_insn_state(p);
    }
@@ -1166,6 +1161,7 @@ joininstruction:
    {
       brw_next_insn(p, $2);
       brw_asm_label_use_jip($5);
+      brw_eu_inst_set_unused_uip(p->devinfo, brw_last_inst);
       i965_asm_set_instruction_options(p, $6);
       brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
@@ -1185,7 +1181,6 @@ breakinstruction:
       brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
       brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
-      brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
       brw_pop_insn_state(p);
    }
@@ -1199,10 +1194,6 @@ breakinstruction:
 
       brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
 
-      if (p->devinfo->ver < 12) {
-         brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-      }
-
       brw_pop_insn_state(p);
    }
    | predicate CONT execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
@@ -1214,8 +1205,6 @@ breakinstruction:
       brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
       brw_set_dest(p, brw_last_inst, brw_ip_reg());
 
-      brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-
       brw_pop_insn_state(p);
    }
    ;
@@ -1226,12 +1215,11 @@ loopinstruction:
    {
       brw_next_insn(p, $2);
       brw_asm_label_use_jip($5);
+      brw_eu_inst_set_unused_uip(p->devinfo, brw_last_inst);
       i965_asm_set_instruction_options(p, $6);
       brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
       brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
-      if (p->devinfo->ver < 12)
-         brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
       brw_pop_insn_state(p);
    }