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i965/vec4: Assign correct destination offset to rewritten instruction in register coalesce.

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Because the pass already checks that the destination offset of each
'scan_inst' that needs to be rewritten matches 'inst->src[0].offset'
exactly, the final offset of the rewritten instruction is just the
original destination offset of the copy.  This is in preparation for
adding support for sub-GRF offsets to the VEC4 IR.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
This commit is contained in:
Francisco Jerez
2016-09-01 22:12:04 -07:00
parent 3a74e437fd
commit 8bed1adfc1
1 changed files with 1 additions and 2 deletions
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src/mesa/drivers/dri/i965/brw_vec4.cpp
+1 -2
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@@ -1254,8 +1254,7 @@ vec4_visitor::opt_register_coalesce()
inst->src[0].swizzle);
scan_inst->dst.file = inst->dst.file;
scan_inst->dst.nr = inst->dst.nr;
scan_inst->dst.offset = scan_inst->dst.offset % REG_SIZE +
ROUND_DOWN_TO(inst->dst.offset, REG_SIZE);
scan_inst->dst.offset = inst->dst.offset;
if (inst->saturate &&
inst->dst.type != scan_inst->dst.type) {
/* If we have reached this point, scan_inst is a non