panfrost: Fix dated comment
Work register counts are not explicitly stored for blend shaders, and blend shaders are used for far more than UNORM8. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
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@@ -48,29 +48,17 @@
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*
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* As is typical with Midgard, shader binaries must be accompanied by
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* information about the first tag (ORed with the bottom nibble of address,
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* like usual) and work registers. Work register count is specified in the
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* blend descriptor, as well as in the coresponding fragment shader's work
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* count. This suggests that blend shader invocation is tied to fragment shader
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* like usual) and work registers. Work register count is assumed to be less
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* than or equal to the coresponding fragment shader's work count. This
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* suggests that blend shader invocation is tied to fragment shader
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* execution.
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*
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* ---
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*
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* As for blend shaders, they use the standard ISA.
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*
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* The source pixel colour, including alpha, is preloaded into r0 as a vec4 of
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* float32.
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*
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* The destination pixel colour must be loaded explicitly via load/store ops.
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* TODO: Investigate.
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*
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* They use fragment shader writeout; however, instead of writing a vec4 of
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* float32 for RGBA encoding, we writeout a vec4 of uint8, using 8-bit imov
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* instead of 32-bit fmov. The net result is that r0 encodes a single uint32
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* containing all four channels of the color. Accordingly, the blend shader
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* epilogue has to scale all four channels by 255 and then type convert to a
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* uint8.
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*
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* ---
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* The shaders themselves use the standard ISA. The source pixel colour,
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* including alpha, is preloaded into r0 as a vec4 of float32. The destination
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* pixel colour must be loaded explicitly via load/store ops, possibly
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* performing conversions in software. The blended colour must be stored with a
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* fragment writeout in the correct framebuffer format, either in software or
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* via conversion opcodes on the load/store pipe.
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*
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* Blend shaders hardcode constants. Naively, this requires recompilation each
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* time the blend color changes, which is a performance risk. Accordingly, we
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