radeonsi: make sure that DSA state != NULL and remove all NULL checking

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

src/gallium/auxiliary/util/u_blitter.c

@@ -347,6 +347,13 @@ void *util_blitter_get_noop_blend_state(struct blitter_context *blitter)
    return ctx->blend[0][0];
 }
 
+void *util_blitter_get_noop_dsa_state(struct blitter_context *blitter)
+{
+   struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter;
+
+   return ctx->dsa_keep_depth_stencil;
+}
+
 static void bind_vs_pos_only(struct blitter_context_priv *ctx,
                              unsigned num_so_channels)
 {

src/gallium/auxiliary/util/u_blitter.h

@@ -155,6 +155,7 @@ void util_blitter_destroy(struct blitter_context *blitter);
 
 void util_blitter_cache_all_shaders(struct blitter_context *blitter);
 void *util_blitter_get_noop_blend_state(struct blitter_context *blitter);
+void *util_blitter_get_noop_dsa_state(struct blitter_context *blitter);
 
 
 /**

src/gallium/drivers/radeonsi/si_pipe.c

@@ -547,6 +547,9 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
 		sctx->noop_blend = util_blitter_get_noop_blend_state(sctx->blitter);
 		sctx->queued.named.blend = sctx->noop_blend;
 
+		sctx->noop_dsa = util_blitter_get_noop_dsa_state(sctx->blitter);
+		sctx->queued.named.dsa = sctx->noop_dsa;
+
 		si_init_draw_functions(sctx);
 		si_initialize_prim_discard_tunables(sctx);
 	}

src/gallium/drivers/radeonsi/si_pipe.h

@@ -887,6 +887,7 @@ struct si_context {
 
 	struct blitter_context		*blitter;
 	void				*noop_blend;
+	void				*noop_dsa;
 	void				*custom_dsa_flush;
 	void				*custom_blend_resolve;
 	void				*custom_blend_fmask_decompress;

src/gallium/drivers/radeonsi/si_state.c

@@ -1303,8 +1303,8 @@ static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
 	struct si_state_dsa *old_dsa = sctx->queued.named.dsa;
         struct si_state_dsa *dsa = state;
 
-        if (!state)
-                return;
+        if (!dsa)
+                dsa = (struct si_state_dsa *)sctx->noop_dsa;
 
 	si_pm4_bind_state(sctx, dsa, dsa);
 
@@ -1314,19 +1314,17 @@ static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
 		si_mark_atom_dirty(sctx, &sctx->atoms.s.stencil_ref);
 	}
 
-	if (!old_dsa || old_dsa->alpha_func != dsa->alpha_func)
+	if (old_dsa->alpha_func != dsa->alpha_func)
 		sctx->do_update_shaders = true;
 
 	if (sctx->screen->dpbb_allowed &&
-	    (!old_dsa ||
-	     (old_dsa->depth_enabled != dsa->depth_enabled ||
+	    ((old_dsa->depth_enabled != dsa->depth_enabled ||
 	      old_dsa->stencil_enabled != dsa->stencil_enabled ||
 	      old_dsa->db_can_write != dsa->db_can_write)))
 		si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
 
 	if (sctx->screen->has_out_of_order_rast &&
-	    (!old_dsa ||
-	     memcmp(old_dsa->order_invariance, dsa->order_invariance,
+	    (memcmp(old_dsa->order_invariance, dsa->order_invariance,
 		    sizeof(old_dsa->order_invariance))))
 		si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_config);
 }

src/gallium/drivers/radeonsi/si_state_binning.c

@@ -483,7 +483,7 @@ void si_emit_dpbb_state(struct si_context *sctx)
 
 	assert(sctx->chip_class >= GFX9);
 
-	if (!sscreen->dpbb_allowed || !dsa || sctx->dpbb_force_off) {
+	if (!sscreen->dpbb_allowed || sctx->dpbb_force_off) {
 		si_emit_dpbb_disable(sctx);
 		return;
 	}

src/gallium/drivers/radeonsi/si_state_shaders.c

@@ -1689,10 +1689,7 @@ static void si_shader_init_pm4_state(struct si_screen *sscreen,
 static unsigned si_get_alpha_test_func(struct si_context *sctx)
 {
 	/* Alpha-test should be disabled if colorbuffer 0 is integer. */
-	if (sctx->queued.named.dsa)
-		return sctx->queued.named.dsa->alpha_func;
-
-	return PIPE_FUNC_ALWAYS;
+	return sctx->queued.named.dsa->alpha_func;
 }
 
 void si_shader_selector_key_vs(struct si_context *sctx,