radeonsi: gather stream info in nir path
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
@@ -248,6 +248,43 @@ void si_nir_scan_shader(const struct nir_shader *nir,
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info->output_semantic_index[i] = semantic_index;
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info->output_usagemask[i] = TGSI_WRITEMASK_XYZW;
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unsigned num_components = 4;
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unsigned vector_elements = glsl_get_vector_elements(glsl_without_array(variable->type));
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if (vector_elements)
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num_components = vector_elements;
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unsigned gs_out_streams;
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if (variable->data.stream & (1u << 31)) {
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gs_out_streams = variable->data.stream & ~(1u << 31);
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} else {
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assert(variable->data.stream < 4);
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gs_out_streams = 0;
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for (unsigned j = 0; j < num_components; ++j)
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gs_out_streams |= variable->data.stream << (2 * (variable->data.location_frac + j));
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}
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unsigned streamx = gs_out_streams & 3;
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unsigned streamy = (gs_out_streams >> 2) & 3;
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unsigned streamz = (gs_out_streams >> 4) & 3;
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unsigned streamw = (gs_out_streams >> 6) & 3;
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if (info->output_usagemask[i] & TGSI_WRITEMASK_X) {
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info->output_streams[i] |= streamx;
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info->num_stream_output_components[streamx]++;
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}
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if (info->output_usagemask[i] & TGSI_WRITEMASK_Y) {
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info->output_streams[i] |= streamy << 2;
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info->num_stream_output_components[streamy]++;
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}
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if (info->output_usagemask[i] & TGSI_WRITEMASK_Z) {
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info->output_streams[i] |= streamz << 4;
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info->num_stream_output_components[streamz]++;
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}
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if (info->output_usagemask[i] & TGSI_WRITEMASK_W) {
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info->output_streams[i] |= streamw << 6;
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info->num_stream_output_components[streamw]++;
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}
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switch (semantic_name) {
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case TGSI_SEMANTIC_PRIMID:
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info->writes_primid = true;
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