venus: fix signaled fence creation under multiple timeline

Fixes: 3beb4f055e ("venus: allow renderer submissions on per-context virtgpu rings") Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20366>
2022-12-17 07:41:52 +00:00
parent 3827c465e1
commit 8a16c5283c
1 changed files with 5 additions and 1 deletions
@@ -161,7 +161,11 @@ sim_syncobj_create(struct virtgpu *gpu, bool signaled)
      util_idalloc_init(&sim.ida, 32);

      struct drm_virtgpu_execbuffer args = {
-         .flags = VIRTGPU_EXECBUF_FENCE_FD_OUT,
+         .flags = VIRTGPU_EXECBUF_FENCE_FD_OUT |
+                  (gpu->base.info.supports_multiple_timelines
+                      ? VIRTGPU_EXECBUF_RING_IDX
+                      : 0),
+         .ring_idx = 0, /* CPU ring */
      };
      int ret = drmIoctl(gpu->fd, DRM_IOCTL_VIRTGPU_EXECBUFFER, &args);
      if (ret || args.fence_fd < 0) {