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radeonsi/uvd_enc: Support Pre-Encode

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Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32829>
This commit is contained in:
David Rosca
2024-12-31 12:38:19 +01:00
committed by Marge Bot
parent 7570311269
commit 89d43c0fd3
2 changed files with 30 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/radeonsi/radeon_uvd_enc.c
+30
View File
@@ -29,6 +29,10 @@ static void radeon_uvd_enc_get_param(struct radeon_uvd_encoder *enc,
enc->enc_pic.enc_params.reference_picture_index =
pic->ref_list0[0] == PIPE_H2645_LIST_REF_INVALID_ENTRY ? 0xffffffff : pic->ref_list0[0];
enc->enc_pic.enc_params.reconstructed_picture_index = pic->dpb_curr_pic;
enc->enc_pic.session_init.pre_encode_mode =
pic->quality_modes.pre_encode_mode ? RENC_UVD_PREENCODE_MODE_4X : RENC_UVD_PREENCODE_MODE_NONE;
enc->enc_pic.session_init.pre_encode_chroma_enabled = !!enc->enc_pic.session_init.pre_encode_mode;
}
static int flush(struct radeon_uvd_encoder *enc, unsigned flags, struct pipe_fence_handle **fence)
@@ -57,6 +61,7 @@ static uint32_t setup_dpb(struct radeon_uvd_encoder *enc, uint32_t num_reconstru
uint32_t luma_size = align(pitch * MAX2(256, aligned_height), alignment);
uint32_t chroma_size = align(luma_size / 2, alignment);
uint32_t offset = 0;
uint32_t pre_encode_luma_size, pre_encode_chroma_size;
assert(num_reconstructed_pictures <= RENC_UVD_MAX_NUM_RECONSTRUCTED_PICTURES);
@@ -64,11 +69,36 @@ static uint32_t setup_dpb(struct radeon_uvd_encoder *enc, uint32_t num_reconstru
enc->enc_pic.ctx_buf.rec_chroma_pitch = pitch;
enc->enc_pic.ctx_buf.num_reconstructed_pictures = num_reconstructed_pictures;
if (enc->enc_pic.session_init.pre_encode_mode) {
uint32_t pre_encode_pitch =
align(pitch / enc->enc_pic.session_init.pre_encode_mode, alignment);
uint32_t pre_encode_aligned_height =
align(aligned_height / enc->enc_pic.session_init.pre_encode_mode, alignment);
pre_encode_luma_size =
align(pre_encode_pitch * MAX2(256, pre_encode_aligned_height), alignment);
pre_encode_chroma_size = align(pre_encode_luma_size / 2, alignment);
enc->enc_pic.ctx_buf.pre_encode_picture_luma_pitch = pre_encode_pitch;
enc->enc_pic.ctx_buf.pre_encode_picture_chroma_pitch = pre_encode_pitch;
enc->enc_pic.ctx_buf.pre_encode_input_picture.luma_offset = offset;
offset += pre_encode_luma_size;
enc->enc_pic.ctx_buf.pre_encode_input_picture.chroma_offset = offset;
offset += pre_encode_chroma_size;
}
for (i = 0; i < num_reconstructed_pictures; i++) {
enc->enc_pic.ctx_buf.reconstructed_pictures[i].luma_offset = offset;
offset += luma_size;
enc->enc_pic.ctx_buf.reconstructed_pictures[i].chroma_offset = offset;
offset += chroma_size;
if (enc->enc_pic.session_init.pre_encode_mode) {
enc->enc_pic.ctx_buf.pre_encode_reconstructed_pictures[i].luma_offset = offset;
offset += pre_encode_luma_size;
enc->enc_pic.ctx_buf.pre_encode_reconstructed_pictures[i].chroma_offset = offset;
offset += pre_encode_chroma_size;
}
}
enc->dpb_slots = num_reconstructed_pictures;
src/gallium/drivers/radeonsi/radeon_uvd_enc_1_1.c
-2
View File
@@ -82,8 +82,6 @@ static void radeon_uvd_enc_session_init_hevc(struct radeon_uvd_encoder *enc)
enc->enc_pic.session_init.aligned_picture_width = align(enc->base.width, 64);
enc->enc_pic.session_init.aligned_picture_height = align(enc->base.height, 16);
enc->enc_pic.session_init.pre_encode_mode = RENC_UVD_PREENCODE_MODE_NONE;
enc->enc_pic.session_init.pre_encode_chroma_enabled = false;
if (enc->enc_pic.session_init.aligned_picture_width > enc->source->width)
padding_width = enc->enc_pic.session_init.aligned_picture_width - enc->source->width;