freedreno: Move blend out of dirty-rsc tracking
This was not doing any actual resource tracking, just updating gmem_reason. And furthermore, a6xx+ doesn't care about the bits it was setting. So move this to per-gen backend for the gens that need it, and avoid setting FD_DIRTY_RESOURCE when FD_DIRTY_BLEND is set. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21274>
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@@ -176,6 +176,8 @@ fd2_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *pinfo,
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if (ctx->dirty & FD_DIRTY_VTXBUF)
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emit_vertexbufs(ctx);
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fd_blend_tracking(ctx);
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if (fd_binning_enabled)
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fd2_emit_state_binning(ctx, ctx->dirty);
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@@ -135,6 +135,8 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
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if (!emit.prog)
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return false;
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fd_blend_tracking(ctx);
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const struct ir3_shader_variant *vp = fd3_emit_get_vp(&emit);
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const struct ir3_shader_variant *fp = fd3_emit_get_fp(&emit);
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@@ -129,6 +129,8 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
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if (!emit.prog)
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return false;
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fd_blend_tracking(ctx);
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const struct ir3_shader_variant *vp = fd4_emit_get_vp(&emit);
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const struct ir3_shader_variant *fp = fd4_emit_get_fp(&emit);
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@@ -105,6 +105,8 @@ fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
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if (!emit.prog)
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return false;
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fd_blend_tracking(ctx);
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const struct ir3_shader_variant *vp = fd5_emit_get_vp(&emit);
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const struct ir3_shader_variant *fp = fd5_emit_get_fp(&emit);
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@@ -601,7 +601,7 @@ fd_stream_output_target(struct pipe_stream_output_target *target)
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static inline bool
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fd_context_dirty_resource(enum fd_dirty_3d_state dirty)
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{
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return dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_ZSA | FD_DIRTY_BLEND |
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return dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_ZSA |
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FD_DIRTY_SSBO | FD_DIRTY_IMAGE | FD_DIRTY_VTXBUF |
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FD_DIRTY_TEX | FD_DIRTY_STREAMOUT | FD_DIRTY_QUERY);
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}
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@@ -132,15 +132,6 @@ batch_draw_tracking_for_dirty_bits(struct fd_batch *batch) assert_dt
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}
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}
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if (ctx->dirty & FD_DIRTY_BLEND) {
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if (ctx->blend->logicop_enable)
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batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
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for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
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if (ctx->blend->rt[i].blend_enable)
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batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
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}
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}
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u_foreach_bit (s, ctx->bound_shader_stages) {
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/* Mark constbuf as being read: */
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if (ctx->dirty_shader[s] & FD_DIRTY_SHADER_CONST) {
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@@ -171,4 +171,21 @@ fd_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
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idx_buffer);
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}
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static inline void
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fd_blend_tracking(struct fd_context *ctx)
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assert_dt
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{
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if (ctx->dirty & FD_DIRTY_BLEND) {
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struct fd_batch *batch = ctx->batch;
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struct pipe_framebuffer_state *pfb = &batch->framebuffer;
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if (ctx->blend->logicop_enable)
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batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
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for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
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if (ctx->blend->rt[i].blend_enable)
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batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
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}
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}
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}
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#endif /* FREEDRENO_DRAW_H_ */
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