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i965: Remove unneeded VS workaround stalls on Baytrail.

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According to the workarounds list, these stalls aren't needed on
production Baytrail systems.  Piglit confirms that as well.

These cause a small slowdown when we are sending a large number of small
batches to the GPU.  Removing these improves performance by up to 5% on
some CPU bound SynMark tests (Batch[4-7], DrvState1, HdrBloom,
Multithread, ShMapPcf).

Signed-off-by: Gregory Hunt <greg.hunt@mobica.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Greg Hunt
2014-06-25 14:42:24 +01:00
committed by Kenneth Graunke
parent 05126b9bb5
commit 890287b96b
4 changed files with 6 additions and 6 deletions
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src/mesa/drivers/dri/i965/gen6_vs_state.c
+1 -1
View File
@@ -100,7 +100,7 @@ gen6_upload_vs_push_constants(struct brw_context *brw)
stage_state, AUB_TRACE_VS_CONSTANTS);
if (brw->gen >= 7) {
if (brw->gen == 7 && !brw->is_haswell)
if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail)
gen7_emit_vs_workaround_flush(brw);
gen7_upload_constant_state(brw, stage_state, true /* active */,
src/mesa/drivers/dri/i965/gen7_sampler_state.c
+1 -1
View File
@@ -212,7 +212,7 @@ gen7_upload_sampler_state_table(struct brw_context *brw,
}
}
if (brw->gen == 7 && !brw->is_haswell &&
if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail &&
stage_state->stage == MESA_SHADER_VERTEX) {
gen7_emit_vs_workaround_flush(brw);
}
src/mesa/drivers/dri/i965/gen7_urb.c
+3 -3
View File
@@ -121,9 +121,9 @@ gen7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
* A PIPE_CONTOL command with the CS Stall bit set must be programmed
* in the ring after this instruction.
*
* No such restriction exists for Haswell.
* No such restriction exists for Haswell or Baytrail.
*/
if (brw->gen < 8 && !brw->is_haswell)
if (brw->gen < 8 && !brw->is_haswell && !brw->is_baytrail)
gen7_emit_cs_stall_flush(brw);
}
@@ -263,7 +263,7 @@ gen7_upload_urb(struct brw_context *brw)
brw->urb.vs_start = push_constant_chunks;
brw->urb.gs_start = push_constant_chunks + vs_chunks;
if (brw->gen == 7 && !brw->is_haswell)
if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail)
gen7_emit_vs_workaround_flush(brw);
gen7_emit_urb_state(brw,
brw->urb.nr_vs_entries, vs_size, brw->urb.vs_start,
src/mesa/drivers/dri/i965/gen7_vs_state.c
+1 -1
View File
@@ -72,7 +72,7 @@ upload_vs_state(struct brw_context *brw)
const int max_threads_shift = brw->is_haswell ?
HSW_VS_MAX_THREADS_SHIFT : GEN6_VS_MAX_THREADS_SHIFT;
if (!brw->is_haswell)
if (!brw->is_haswell && !brw->is_baytrail)
gen7_emit_vs_workaround_flush(brw);
/* Use ALT floating point mode for ARB vertex programs, because they