radeonsi: separate IA_MULTI_VGT_PARAM and VGT_PRIMITIVE_TYPE emission
We want to emit IA_MULTI_VGT_PARAM less often because it's a context reg. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
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@@ -473,18 +473,21 @@ static void si_emit_draw_registers(struct si_context *sctx,
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ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info, num_patches);
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/* Draw state. */
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if (prim != sctx->last_prim ||
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ia_multi_vgt_param != sctx->last_multi_vgt_param) {
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if (sctx->b.chip_class >= CIK) {
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if (ia_multi_vgt_param != sctx->last_multi_vgt_param) {
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if (sctx->b.chip_class >= CIK)
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radeon_set_context_reg_idx(cs, R_028AA8_IA_MULTI_VGT_PARAM, 1, ia_multi_vgt_param);
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radeon_set_uconfig_reg_idx(cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim);
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} else {
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radeon_set_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim);
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else
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radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param);
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}
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sctx->last_multi_vgt_param = ia_multi_vgt_param;
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}
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if (prim != sctx->last_prim) {
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if (sctx->b.chip_class >= CIK)
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radeon_set_uconfig_reg_idx(cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim);
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else
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radeon_set_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim);
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sctx->last_prim = prim;
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sctx->last_multi_vgt_param = ia_multi_vgt_param;
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}
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if (gs_out_prim != sctx->last_gs_out_prim) {
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