freedreno/ir3: Stop doing b2n on the SEL condition.

SEL_B32 (and presumably B16) checks for 0 or nonzero in the condition
(tested by just stuffing a uniform's value into it), so there's no need to
do ir3_b2n() on it, or any preceding ir3_n2b().

instructions in affected programs: 664444 -> 659927 (-0.68%)
nops in affected programs: 267898 -> 266312 (-0.59%)
non-nops in affected programs: 420260 -> 417329 (-0.70%)
dwords in affected programs: 144032 -> 137568 (-4.49%)
last-baryf in affected programs: 10801 -> 10321 (-4.44%)
full in affected programs: 2003 -> 2002 (-0.05%)
sstall in affected programs: 76670 -> 77405 (0.96%)
(ss) in affected programs: 4515 -> 4525 (0.22%)
(sy) in affected programs: 612 -> 604 (-1.31%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4516>

src/freedreno/ir3/ir3.h

@@ -1529,6 +1529,7 @@ INSTR3(MAD_U24)
 INSTR3(MAD_S24)
 INSTR3(MAD_F16)
 INSTR3(MAD_F32)
+/* NOTE: SEL_B32 checks for zero vs nonzero */
 INSTR3(SEL_B16)
 INSTR3(SEL_B32)
 INSTR3(SEL_S16)

src/freedreno/ir3/ir3_compiler_nir.c

@@ -629,10 +629,17 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
 
 	case nir_op_b16csel:
 	case nir_op_b32csel: {
-		struct ir3_instruction *cond = ir3_b2n(b, src[0]);
+		struct ir3_instruction *cond = src[0];
 
-		if ((src[0]->regs[0]->flags & IR3_REG_HALF))
-			cond->regs[0]->flags |= IR3_REG_HALF;
+		/* If src[0] is a negation (likely as a result of an ir3_b2n(cond)),
+		 * we can ignore that and use original cond, since the nonzero-ness of
+		 * cond stays the same.
+		 */
+		if (cond->opc == OPC_ABSNEG_S &&
+				cond->flags == 0 &&
+				(cond->regs[1]->flags & (IR3_REG_SNEG | IR3_REG_SABS)) == IR3_REG_SNEG) {
+			cond = cond->regs[1]->instr;
+		}
 
 		compile_assert(ctx, bs[1] == bs[2]);
 		/* Make sure the boolean condition has the same bit size as the other