AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

anv: report max simd width only once for fragment shaders

Browse Source 
Reporting the value multiple times is confusing to shader-db scripts
because it believes multiple shaders are affected.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23559>
This commit is contained in:
Lionel Landwerlin
2023-06-09 16:32:17 +03:00
committed by Marge Bot
parent a0a20164eb
commit 810da51e91
1 changed files with 5 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/vulkan/anv_pipeline.c
+5 -1
View File
@@ -4224,7 +4224,11 @@ VkResult anv_GetPipelineExecutableStatisticsKHR(
WRITE_STR(stat->description,
"Largest SIMD dispatch width.");
stat->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR;
stat->value.u64 = exe->stats.max_dispatch_width;
/* Report the max dispatch width only on the smallest SIMD variant */
if (exe->stage != MESA_SHADER_FRAGMENT || exe->stats.dispatch_width == 8)
stat->value.u64 = exe->stats.max_dispatch_width;
else
stat->value.u64 = 0;
}
vk_outarray_append_typed(VkPipelineExecutableStatisticKHR, &out, stat) {