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aco: implement 8-bit/16-bit mov's with p_create_vector

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ACO doesn't lower 8-bit/16-bit mov's in NIR.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2997
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
This commit is contained in:
Samuel Pitoiset
2020-05-07 20:51:02 +02:00
committed by Marge Bot
parent 860b4d16f4
commit 7ffd394605
1 changed files with 8 additions and 6 deletions
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src/amd/compiler/aco_instruction_selection.cpp
+8 -6
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@@ -1056,13 +1056,15 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
bld.sop1(aco_opcode::s_mov_b64, Definition(dst), src);
else
unreachable("wrong src register class for nir_op_imov");
} else if (dst.regClass() == v1) {
bld.vop1(aco_opcode::v_mov_b32, Definition(dst), src);
} else if (dst.regClass() == v2) {
bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src);
} else {
nir_print_instr(&instr->instr, stderr);
unreachable("Should have been lowered to scalar.");
if (dst.regClass() == v1)
bld.vop1(aco_opcode::v_mov_b32, Definition(dst), src);
else if (dst.regClass() == v1b ||
dst.regClass() == v2b ||
dst.regClass() == v2)
bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src);
else
unreachable("wrong src register class for nir_op_imov");
}
break;
}