AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

intel/compiler/xe2: Add extra flag registers.

Browse Source 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
This commit is contained in:
Francisco Jerez
2022-03-07 16:28:28 -08:00
committed by Marge Bot
parent f974eacab3
commit 7f39e51dd5
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/compiler/brw_ir.h
+2 -2
View File
@@ -194,10 +194,10 @@ struct backend_instruction {
*/
bool eot:1;
/* Chooses which flag subregister (f0.0 to f1.1) is used for conditional
/* Chooses which flag subregister (f0.0 to f3.1) is used for conditional
* mod and predication.
*/
unsigned flag_subreg:2;
unsigned flag_subreg:3;
/**
* Systolic depth used by DPAS instruction.