isl: allow sparse with CCS on Xe2 and newer

When the auxiliary surface is handled by the hardware directly,
there's nothing to bind besides the main pixels, so we can allow
sparse without doing anything else. We can't do this in the exact same
way with DG2 (which has_flat_ccs) because it uses the
aux_state_tracking_buffer.

v2: Fix spelling (Nanley).

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37419>

src/intel/isl/isl.c

@@ -3877,7 +3877,10 @@ _isl_surf_info_supports_ccs(const struct isl_device *dev,
    if (usage & ISL_SURF_USAGE_STAGING_BIT)
       return false;
 
-   if (usage & ISL_SURF_USAGE_SPARSE_BIT)
+   /* Xe2 and newer don't require additional space to be allocated by the
+    * driver for plain CCS, so we can trivially allow sparse.
+    */
+   if (ISL_GFX_VER(dev) < 20 && (usage & ISL_SURF_USAGE_SPARSE_BIT))
       return false;
 
    if (usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)